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AS7C3364FT36B-80TQC PDF预览

AS7C3364FT36B-80TQC

更新时间: 2024-11-18 20:17:47
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器
页数 文件大小 规格书
19页 417K
描述
Standard SRAM, 64KX36, 8ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100

AS7C3364FT36B-80TQC 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LQFP,针数:100
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.52
最长访问时间:8 ns其他特性:FLOW-THROUGH ARCHITECTURE
JESD-30 代码:R-PQFP-G100JESD-609代码:e0
长度:20 mm内存密度:2359296 bit
内存集成电路类型:STANDARD SRAM内存宽度:36
功能数量:1端子数量:100
字数:65536 words字数代码:64000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:64KX36
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装形状:RECTANGULAR封装形式:FLATPACK, LOW PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1.6 mm
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.65 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:14 mm
Base Number Matches:1

AS7C3364FT36B-80TQC 数据手册

 浏览型号AS7C3364FT36B-80TQC的Datasheet PDF文件第2页浏览型号AS7C3364FT36B-80TQC的Datasheet PDF文件第3页浏览型号AS7C3364FT36B-80TQC的Datasheet PDF文件第4页浏览型号AS7C3364FT36B-80TQC的Datasheet PDF文件第5页浏览型号AS7C3364FT36B-80TQC的Datasheet PDF文件第6页浏览型号AS7C3364FT36B-80TQC的Datasheet PDF文件第7页 
AS7C3364FT32B  
AS7C3364FT36B  
February 2005  
®
3.3V 64K × 32/36 Flow Through Synchronous SRAM  
Features  
• Multiple chip enables for easy expansion  
• 3.3V core power supply  
• Organization: 65,536 words × 32 or 36 bits  
• Fast clock to data access: 6.5/7.5/8.0/10.0 ns  
• Fast OE access time: 3.5/4.0 ns  
• Fully synchronous flow through operation  
• Asynchronous output enable control  
• Available in 100-pin TQFP package  
• Individual byte write and Global write  
• 2.5V or 3.3V I/O operation with separate V  
• Linear or interleaved burst control  
• Snooze mode for reduced power standby  
• Common data inputs and data outputs  
DDQ  
Logic block diagram  
LBO  
CLK  
ADV  
CLK  
CE  
Burst logic  
ADSC  
ADSP  
CLR  
64K × 32/36  
Memory  
array  
18  
16  
18  
18  
D
CE  
CLK  
Q
A
[17:0]  
Address  
register  
36/32  
36/32  
GWE  
BWE  
BWd  
D
Q
DQd  
Byte write  
registers  
CLK  
D
Q
DQc  
Byte write  
registers  
BWc  
BWb  
BWa  
CLK  
D
Q
DQb  
Byte write  
registers  
CLK  
D
Q
DQa  
Byte write  
4
registers  
CLK  
CE0  
CE1  
OE  
Output  
buffer  
D
Q
Q
CE2  
Input  
registers  
CLK  
Enable  
register  
CE  
CLK  
D
Enable  
Power  
down  
delay  
register  
CLK  
ZZ  
36/32  
OE  
DQ[a:d]  
Selection guide  
–65  
-75  
8.5  
7.5  
250  
85  
-80  
10  
-10  
12  
Units  
ns  
Minimum cycle time  
7.5  
6.5  
275  
90  
Maximum clock access time  
Maximum operating current  
Maximum standby current  
8.0  
215  
75  
10.0  
185  
75  
ns  
mA  
mA  
mA  
Maximum CMOS standby current (DC)  
30  
30  
30  
30  
2/8/05; v.1.2  
Alliance Semiconductor  
P. 1 of 19  
Copyright © Alliance Semiconductor. All rights reserved.  

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