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AS7C33256PFD36A-166TQI PDF预览

AS7C33256PFD36A-166TQI

更新时间: 2024-10-28 20:20:15
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器内存集成电路
页数 文件大小 规格书
20页 527K
描述
Standard SRAM, 256KX36, 3.5ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100

AS7C33256PFD36A-166TQI 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LQFP,针数:100
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.37
最长访问时间:3.5 ns其他特性:FLOW-THROUGH OR PIPELINED ARCHITECTURE
JESD-30 代码:R-PQFP-G100JESD-609代码:e0
长度:20 mm内存密度:9437184 bit
内存集成电路类型:STANDARD SRAM内存宽度:36
功能数量:1端子数量:100
字数:262144 words字数代码:256000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:256KX36
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装形状:RECTANGULAR封装形式:FLATPACK, LOW PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1.6 mm
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.65 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:14 mm
Base Number Matches:1

AS7C33256PFD36A-166TQI 数据手册

 浏览型号AS7C33256PFD36A-166TQI的Datasheet PDF文件第4页浏览型号AS7C33256PFD36A-166TQI的Datasheet PDF文件第5页浏览型号AS7C33256PFD36A-166TQI的Datasheet PDF文件第6页浏览型号AS7C33256PFD36A-166TQI的Datasheet PDF文件第8页浏览型号AS7C33256PFD36A-166TQI的Datasheet PDF文件第9页浏览型号AS7C33256PFD36A-166TQI的Datasheet PDF文件第10页 
AS7C33256PFD32A  
AS7C33256PFD36A  
®
[4]  
Synchronous truth table  
[2]  
CE01  
H
L
CE1  
X
L
CE2  
X
X
X
H
H
L
ADSP ADSC ADV WRITE  
OE  
X
X
X
X
X
L
Address accessed  
NA  
CLK  
Operation  
Deselect  
DQ  
HiZ  
HiZ  
HiZ  
HiZ  
HiZ  
Q
X
L
L
X
L
X
X
X
X
X
X
X
X
X
L
X
X
X
X
X
X
X
H
H
H
H
H
H
H
H
H
H
L
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
NA  
Deselect  
L
L
H
L
NA  
Deselect  
L
X
X
H
H
H
H
X
X
X
X
X
X
X
X
H
X
X
X
X
X
L
NA  
Deselect  
L
H
L
NA  
Deselect  
L
X
X
L
External  
External  
External  
External  
Next  
Begin read  
L
L
L
H
L
Begin read  
HiZ  
Q
L
L
H
H
H
H
H
H
X
X
X
X
H
H
X
H
X
Begin read  
L
L
L
H
L
Begin read  
HiZ  
Q
X
X
X
X
H
H
H
H
L
X
X
X
X
X
X
X
X
L
H
H
H
H
H
H
H
H
L
Continue read  
Continue read  
Suspend read  
Suspend read  
Continue read  
Continue read  
Suspend read  
Suspend read  
Begin write  
Continue write  
Continue write  
Suspend write  
Suspend write  
L
H
L
Next  
HiZ  
Q
H
H
L
Current  
Current  
Next  
H
L
HiZ  
Q
L
H
L
Next  
HiZ  
Q
H
H
X
L
Current  
Current  
External  
Next  
H
X
X
X
X
X
HiZ  
3
D
X
H
X
H
X
X
X
X
H
H
H
H
L
D
D
D
D
L
L
Next  
H
H
L
Current  
Current  
L
1 X = don’t care, L = low, H = high  
2 For WRITE, L means any one or more byte write enable signals (BWa, BWb, BWc or BWd) and BWE are LOW or GWE is LOW. WRITE = HIGH for all  
BWx, BWE, GWE HIGH. See "Write enable truth table (per byte)," on page 6 for more information.  
3 For write operation following a READ, OE must be high before the input data set up time and held high throughout the input hold time  
4 ZZ pin is always Low.  
12/1/04, v.1.2  
Alliance Semiconductor  
P. 7 of 20  

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