Datasheet > AS4C4M4EOQ

AS4C4M4EOQ

更新时间： 2022-01-19 04:33:00

品牌	Logo	应用领域
其他 - ETC		动态存储器
页数	文件大小	规格书
16页	354K
描述
4M x 4 CMOS QuadCAS DRAM (EDO) family

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AS4C4M4EOQ 数据手册

AS4C4M4EOQ

AS4C4M4E1Q

Logic block diagram for 4K refresh

Data

I/O

buffers

V_CC

Column decoder

Sense amp

GND

I/O0 to I/O3

RAS clock

generator

RAS

CAS

4,194,304 × 4

Array

CAS clock

generator

(16,777,216)

A10

A11

WE clock

generator

Logic block diagram for 2K refresh

Data

I/O

buffers

V_CC

Column decoder

Sense amp

GND

I/O0 to I/O3

RAS clock

generator

RAS

CAS

4,194,304 × 4

Array

CAS clock

generator

(16,777,216)

A10

Substrate bias

generator

WE clock

generator

Recommended operating conditions

Parameter

Symbol

V_CC

Min

Nominal

Max

5.5

Unit

4C4M4EOQ

AS4C4M4E1Q

4.5

0.0

2.4

5.0

0.0

–

Supply voltage

GND

V_IH

0.0

4C4M4EOQ

AS4C4M4E1Q

V_CC

Input voltage

V_IL

T_A

–0.5^†

–

0.8

Ambient operating temperature

°C

†

min -3.0V for pulse widths less than 5 ns. Recommended operating conditions apply throughout this document unlesss otherwise specified.

3/22/01; v.1.0

Alliance Semiconductor

P. 3 of 16

1 234 5 6 7...16

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