Datasheet > AS4C4M4EOQ

AS4C4M4EOQ

更新时间： 2022-01-19 04:33:00

品牌	Logo	应用领域
其他 - ETC		动态存储器
页数	文件大小	规格书
16页	354K
描述
4M x 4 CMOS QuadCAS DRAM (EDO) family

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数据手册

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AS4C4M4EOQ 数据手册

AS4C4M4EOQ

AS4C4M4E1Q

CAS-before-RAS self refresh cycle

t_RP

t_RASS

t_RPS

RAS

t_RPC

t_CP

t_RPC

t_CSR

t_CHS

UCAS,

LCAS

t_CEZ

Capacitance ¹⁵

ƒ = 1 MHz, T_a= Room temperature

Parameter

Symbol

C_IN1

Signals

Test conditions

V_in= 0V

Max

Unit

A0 to A9

Input capacitance

DQ capacitance

C_IN2

RAS, UCAS, LCAS, WE, OE

DQ0 to DQ15

V_in= 0V

C_DQ

V_in= V_out= 0V

4C4M4EOQ ordering information

Package \ RAS access time

50 ns

60 ns

Plastic SOJ, 300 mil, 24/26-pin

Plastic TSOP, 300 mil, 24/26-pin

4C4M4EOQ-50JC

4C4M4EOQ-50TC

4C4M4EOQ-60JC

4C4M4EOQ-60TC

AS4C4M4E1Q ordering information

Package \ RAS access time

50 ns

60 ns

Plastic SOJ, 300 mil, 24/26-pin

Plastic TSOP, 300 mil, 24/26-pin

AS4C4M4E1Q-50JC

AS4C4M4E1Q-50TC

AS4C4M4E1Q-60JC

AS4C4M4E1Q-60TC

4C4M4EOQ family part numbering system

AS4

4M4

–XX

Package:

J = SOJ 300 mil, 24/26

T = TSOP 300 mil, 24/26

DRAM

prefix

C = 5V CMOS

LC = 3.3V CMOS

E0=4K refresh RAS access

E1=2K refresh time

Commercial temperature

range, 0°C to 70 °C

4M×4

3/22/01; v.1.0

Alliance Semiconductor

P. 16 of 16

1...13 14 1516

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