National Semiconductor
Application Note 276
Sing W. Chin
A New, Low-Cost,
Sampled-Data, 10-Bit
CMOS A/D Converter
July 1981
‘‘IF IT’S NOT LOW COST, IT’S NOT CREATIVE’’
g
If the A/D converter has an accuracy of 1 least significant
Cost is the single most important factor in the success of
any new product. The current emphasis on digital ap-
proaches to build electronic systems and the success of
microprocessors have created new, high-volume markets
for low cost A/D converters. Without this stimulation in the
marketplace, converter products would not have been se-
lected as monolithic components, due to the relatively low
volume usage of the traditional products. The challenge to-
day, therefore, is to find new design solutions which will
reduce costs of A/Ds without sacrificing the performance
specifications.
g
g
bit (LSB), this could be expressed as 1/1024 or 0.1% of
full-scale.
10 BITS PRESENTS DESIGN PROBLEM
An A/D converter which provides every possible analog
10
voltage as a tap on a resistor ladder would require 2 , or
1024 resistors. A ladder expansion technique has been pre-
viously developed which has greatly reduced the number of
resistors. This technique has been used to provide an 8-bit
A/D (the ADC0804 family) which uses a theoretical mini-
mum of only 7 resistors. (In practice, extra resistors are typi-
cally used to improve matching by making use of unit resis-
tors.)
HOW MANY BITS ARE NEEDED?
The question of how many bits are needed in the A/D con-
verter for a particular system is not always easy to answer.
This is further complicated because of the distinction which
must first be made between resolution and accuracy. For
example, your digital bathroom scale may have graduations
which indicate each pound over a range which extends from
zero to 300 pounds maximum. This means you are capable
of ‘‘resolving’’ one pound over this complete dynamic range
or ‘‘span.’’ The next question is, ‘‘What do I really weigh,
say, on my doctor’s scale?’’ You may find that his scale
indicates you are actually three pounds heavier than your
scale indicates: this is the accuracy problem.
This 8-bit A/D design was the starting point for developing
this 10-bit converter. A new idea, which is key to the 10-bit
design, is a novel way to, in effect, use the previous 8-bit
²
circuit four times to increase the resolution to 10 bits . This
was achieved by adding 2 MSBs to the 8-bit design. We will
first review the 8-bit A/D operation as a basis for under-
standing the new 10-bit design.
THE BASIC 8-BIT DESIGN
The essential part of the ADC0804 8-bit A/D family is a
novel, multiple input, voltage comparator. This circuit allows
a new feature for a comparator: multiple, differential volt-
ages can be accepted as simultaneous inputs to the com-
parator, and each differential input can be weighted by scal-
ing the size of the associated input capacitor. The traditional
op amp summing circuit, Figure 1, is similar, but accepts
single-ended voltage inputs, and first converts each input
voltage to an input current by making use of a scaled or
weighted input resistor. These input currents are then alge-
braically summed at the ‘‘virtual ground’’ or summing junc-
10
A 10-bit A/D is capable of resolving 2 , or 1024, minimum
voltage levels over the range from 0 to V
REF
volts. To put
this into the physical world we live in, this degree of resolu-
tion is capable of differentiating each single sheet of paper,
which is only 0.004 inches (4 mils) thick in a stack of paper 4
inches high. In any stack of paper up to this maximum limit,
a 10-bit A/D could be used in an electronic system which
would sound an alarm if a sheet was added to or removed
from the stack. (For simplicity, this assumes we have a per-
fect height transducer and perfect analog signal condition-
ing circuitry between this transducer and the input to the
A/D.)
b
a
tion (the ( ) input of an op amp which has the ( ) input
grounded). The current surplus (or deficiency) is supplied
through the feedback resistor to produce the output voltage.
TL/H/8716–1
FIGURE 1. The Traditional Op Amp Summing Circuit
²
This design concept was proposed and implemented by John Connolly.
C
1995 National Semiconductor Corporation
TL/H/8716
RRD-B30M115/Printed in U. S. A.
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