AN1029
April, 1996
Maximum Power Enhancement Techniques for SO-8 Power MOSFETs
Alan Li, Brij Mohan, Steve Sapp, Izak Bencuya, Linh Hong
1. Introduction
As packages become smaller, achieving efficient thermal performance for power applications re-
quires that the designers employ new methods of meliorating the heat flow out of devices. Thus
the purpose of this paper is to aid the user in maximizing the power handling capability of the SO-
8 Power MOSFET offered by Fairchild Semiconductor. This effort allows the user to take full
advantage of the exceptional performance features of Fairchild’s state-of-the-art Power MOSFET
which offers very low on-resistance and improved junction-to-case (RθJC) thermal resistance. Ulti-
mately the user may achieve improved component performance and higher circuit board packing
density by using the thermal solution suggested below.
In natural cooling, the method of improving power performance should be focused on the optimum
design of copper mounting pads. The design should take into consideration the size of the copper
and its placement on either or both of the board surfaces. A copper mounting pad is important
because the drain leads of the Power MOSFET are mounted directly onto the pad. The pad acts
as a heatsink to reduce thermal resistance and leads to improved power performance.
D
D2
D
D2
D
D1
D
D1
G
G2
S
S2
S
S1
S
S1
Figure 1. SO-8 Power MOSFET has junction-to-case thermal resistance RθJC of 25oC/W for single device
and 40 oC/W for dual devices.
2. Theory
When a device operates in a system under the steady-state condition, the maximum power
dissipation is determined by the maximum junction temperature rating, the ambient temperature,
and the junction-to-ambient thermal resistance.
PDmax = ( TJmax - TA ) / RθJA (2.1)
The term junction refers to the point of thermal reference of the semiconductor. Equation 2.1 can
also be applied to the transient-state:
Rev B, August 1998
1