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AMIS-52100-M

更新时间： 2024-02-16 18:42:07

品牌	Logo	应用领域
AMI		光电二极管时钟
页数	文件大小	规格书
26页	1576K
描述
Transceiver with Clock and Data Recovery

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技术参数
数据手册

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AMIS-52100-M 技术参数

生命周期：	Active	Reach Compliance Code：	compliant
风险等级：	5.7	Is Samacsys：	N
JESD-30 代码：	R-PDSO-G20	端子数量：	20
最高工作温度：	50 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	SSOP
封装等效代码：	SSOP20,.3	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, SHRINK PITCH	电源：	3 V
认证状态：	Not Qualified	子类别：	Other Telecom ICs
最大压摆率：	25 mA	标称供电电压：	3 V
表面贴装：	YES	温度等级：	COMMERCIAL
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	DUAL	Base Number Matches：	1

AMIS-52100-M 数据手册

AMIS-52100 Low-Power Transceiver with Clock and Data Recovery

Data Sheet

Table 9: Package Dimensions: 209mil SSOP

Inches

Millimeters

Max.

Min.

0.068

0.002

0.065

0.009

0.271

0.291

0.197

Max.

0.078

.20

Min.

1.73

0.05

2.00

0.073

0.015

0.295

0.323

0.221

1.65`

0.22

6.90

7.40

5.00

1.85

0.38

7.5

0.820

0.560

0.026 BSC

0.65 BSC

8.0 Pin Descriptions

8.1 RX1, RX2, RF Inputs

RX1 and RX2 are RF antenna inputs to the AMIS-52100. The internal circuit designs are identical between these inputs. The AMIS-

52100 receiver inputs, RX1 and RX2, require external components to match the low noise amplifier (LNA) to external devices such as

antennas. The external components must provide a DC voltage path to the RF ground. Figure 3 suggests an external circuit for the

receiver inputs at 403MHz. Each circuit’s input impedance can be trimmed internally to compensate for device manufacture and

external component tolerances. The circuits employ an LNA, internal filters, a low frequency, intermediate frequency (IF), and an

received signal strength indication (RSSI) circuit to recover the ASK/OOK modulated data. The signals in the two input channels are

“summed” before the data recovery circuit.

The functions of the receive circuits are controlled by writing to the registers shown in Table 10.

Table 10: Receiver Control Register Description

RX1 or RX2 Receiver Register Control

Bits

All

States

Comments

0x00

0x01

0x0c

ANT1 Trim

ANT2 Trim

ANT1 Enable

Inverse relationship register value to internal capacitance

Antenna port is off

Antenna port is on

Antenna port is off

ANT2 Enable

Antenna port is on

Figure 3: Typical Input Impedance Match to 50Ω (402MHz)

AMI Semiconductor – Rev 4.0, Mar. 06 – M-20535-004

www.amis.com

1...3 4 567 8 9...26

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