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AMD-640

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AMD-640 Chipset IBIS I/O Model Application Note

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AMD-640 数据手册

AMD-640 Chipset I/O Model

Application Note

AMD-640™ Chipset

I/O Model

Introduction

Advances in semiconductor process technology have allowed

the performance of integrated circuits to increase dramatically.

The operating frequency of output signals driven from these

circuits continues to increase, while the switching transitions of

these signals has decreased. These particular characteristics of

high-speed signals pose challenges to a system designer

responsible for the placement and routing of components on

printed circuit boards (PCBs). In particular, the propagation

delay of a signal must be considered to ensure that sufficient

setup and hold time, with adequate margin, exist at a signal’s

destination. In addition, as the rise and fall times of signals

decrease, the system designer must ensure the signal quality

meets the system requirements.

Ensuring that system timing and signal quality objectives are

met prior to PCB manufacturing reduces the development

expense and expedites the time-to-market of a product. This

application note describes the format and usage of the

AMD-640 chipset I/O buffer behavioral model, which allows a

system designer to perform analog simulations of chipset

signals that interface with the system logic. This model adheres

to the I/O Buffer Information Specification (IBIS), Version 2.1.

This document contains information on a product under development at Advanced Micro Devices. The information is

intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed

product without notice.

Document #: 21340

Issue Date: April 1997

Rev. A Amendment/0

12 3 4 5 6 7...12

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