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AM29LV040B-120JFB PDF预览

AM29LV040B-120JFB

更新时间: 2024-11-27 03:51:59
品牌 Logo 应用领域
飞索 - SPANSION 内存集成电路
页数 文件大小 规格书
34页 720K
描述
Flash, 512KX8, 120ns, PQCC32, PLASTIC, LCC-32

AM29LV040B-120JFB 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFJ包装说明:PLASTIC, LCC-32
针数:32Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.83最长访问时间:120 ns
JESD-30 代码:R-PQCC-J32JESD-609代码:e3
长度:13.97 mm内存密度:4194304 bit
内存集成电路类型:FLASH内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:32字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:512KX8封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装形状:RECTANGULAR
封装形式:CHIP CARRIER并行/串行:PARALLEL
峰值回流温度(摄氏度):260编程电压:3 V
认证状态:Not Qualified座面最大高度:3.556 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40类型:NOR TYPE
宽度:11.43 mm

AM29LV040B-120JFB 数据手册

 浏览型号AM29LV040B-120JFB的Datasheet PDF文件第2页浏览型号AM29LV040B-120JFB的Datasheet PDF文件第3页浏览型号AM29LV040B-120JFB的Datasheet PDF文件第4页浏览型号AM29LV040B-120JFB的Datasheet PDF文件第5页浏览型号AM29LV040B-120JFB的Datasheet PDF文件第6页浏览型号AM29LV040B-120JFB的Datasheet PDF文件第7页 
Am29LV040B  
4 Megabit (512 K x 8-Bit)  
CMOS 3.0 Volt-only, Uniform Sector 32-Pin Flash Memory  
DISTINCTIVE CHARACTERISTICS  
Single power supply operation  
Unlock Bypass Program Command  
— Full voltage range: 2.7 to 3.6 volt read and write  
operations for battery-powered applications  
— Reduces overall programming time when issuing  
multiple program command sequences  
— Regulated voltage range: 3.0 to 3.6 volt read and  
write operations and for compatibility with high  
performance 3.3 volt microprocessors  
Embedded Algorithms  
— Embedded Erase algorithms automatically  
preprogram and erase the entire chip or any  
combination of designated sectors  
Manufactured on 0.32 µm process technology  
High performance  
— Embedded Program algorithms automatically  
writes and verifies data at specified addresses  
— Full voltage range: access times as fast as 70 ns  
— Regulated voltage range: access times as fast as  
60 ns  
Minimum 1,000,000 write/erase cycles  
guaranteed  
20-year data retention at 125°C  
— Reliable operation for the life of the system  
Package option  
Ultra low power consumption (typical values at  
5 MHz)  
— Automatic sleep mode: 1 µA  
— Standby mode: 1 µA  
— 32-pin PLCC  
— Read mode: 7 mA  
— 32-pin TSOP  
— Program/erase mode: 15 mA  
Compatibility with JEDEC standards  
— Pinout and software compatible with single-  
power supply Flash  
Flexible sector architecture  
— Eight 64 Kbyte sectors  
— Superior inadvertent write protection  
— Any combination of sectors can be erased;  
supports full chip erase  
Data# Polling and toggle bits  
— Sector Protection features:  
— Provides a software method of detecting program  
or erase cycle completion  
Hardware method of locking a sector to prevent  
any program or erase operations within that sector  
Erase Suspend/Resume  
Sectors can be locked via programming  
equipment  
— Supports reading data from or programming data  
to a sector not being erased  
Publication# 21354 Rev: D Amendment/0  
Issue Date: November 11, 1999  

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