Datasheet > ADSP-2185LBST-133

ADSP-2185LBST-133

更新时间： 2024-02-19 11:46:25

品牌	Logo	应用领域
亚德诺 - ADI		电脑
页数	文件大小	规格书
31页	224K
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DSP Microcomputer

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ADSP-2185LBST-133 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QFP	包装说明：	LFQFP, QFP100,.63SQ,20
针数：	100	Reach Compliance Code：	not_compliant
ECCN代码：	3A991.A.2	HTS代码：	8542.31.00.01
风险等级：	5.36	地址总线宽度：	14
桶式移位器：	YES	边界扫描：	NO
外部数据总线宽度：	24	格式：	FLOATING POINT
集成缓存：	NO	内部总线架构：	MULTIPLE
JESD-30 代码：	S-PQFP-G100	JESD-609代码：	e0
长度：	14 mm	低功率模式：	YES
湿度敏感等级：	3	外部中断装置数量：	6
端子数量：	100	片上数据RAM宽度：	16
片上程序ROM宽度：	24	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFQFP	封装等效代码：	QFP100,.63SQ,20
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE, FINE PITCH
认证状态：	Not Qualified	RAM（字数）：	8192
ROM可编程性：	FLASH	座面最大高度：	1.6 mm
最大供电电压：	3.6 V	最小供电电压：	3 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
宽度：	14 mm	uPs/uCs/外围集成电路类型：	DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches：	1

ADSP-2185LBST-133 数据手册

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DSP Microcomputer

ADSP-2185L

FEATURES

FUNCTIONAL BLOCK DIAGRAM

PERFORMANCE

19 ns Instruction Cycle Time @ 3.3 Volts, 52 MIPS

Sustained Performance

Single-Cycle Instruction Execution

Single-Cycle Context Switch

POWER-DOWN

CONTROL

FULL MEMORY

MODE

MEMORY

DATA ADDRESS

GENERATORS

PROGRAMMABLE

EXTERNAL

ADDRESS

BUS

PROGRAM

SEQUENCER

16K

24 PM

24 OVERLAY 1

16K

16 DM

I/O

AND

FLAGS

16 OVERLAY 1

16 OVERLAY 2

(

)

(

24 OVERLAY 2

DAG 2

DAG 1

)

EXTERNAL

DATA

3-Bus Architecture Allows Dual Operand Fetches in

Every Instruction Cycle

Multifunction Instructions

PROGRAM MEMORY ADDRESS

DATA MEMORY ADDRESS

BUS

BYTE DMA

CONTROLLER

PROGRAM MEMORY DATA

DATA MEMORY DATA

Power-Down Mode Featuring Low CMOS Standby

Power Dissipation with 400 Cycle Recovery from

Power-Down Condition

EXTERNAL

DATA

BUS

Low Power Dissipation in Idle Mode

SERIAL PORTS

SPORT 0 SPORT 1

ARITHMETIC UNITS

ALU SHIFTER

TIMER

INTERNAL

DMA

PORT

MAC

INTEGRATION

ADSP-2100 Family Code Compatible, with Instruction

Set Extensions

ADSP-2100 BASE

ARCHITECTURE

HOST MODE

80K Bytes of On-Chip RAM, Configured as 16K Words

Program Memory RAM and 16K Words

Data Memory RAM

Dual Purpose Program Memory for Instruction and Data

Storage

Independent ALU, Multiplier/Accumulator and Barrel

Shifter Computational Units

Two Independent Data Address Generators

Powerful Program Sequencer Provides Zero Overhead

Looping Conditional Instruction Execution

Programmable 16-Bit Interval Timer with Prescaler

100-Lead LQFP

GENERAL NOTE

This data sheet represents specifications for the ADSP-2185L

3.3 V processor.

GENERAL DESCRIPTION

The ADSP-2185L is a single-chip microcomputer optimized for

digital signal processing (DSP) and other high speed numeric

processing applications.

SYSTEM INTERFACE

The ADSP-2185L combines the ADSP-2100 family base archi-

tecture (three computational units, data address generators and

a program sequencer) with two serial ports, a 16-bit internal

DMA port, a byte DMA port, a programmable timer, Flag I/O,

extensive interrupt capabilities and on-chip program and data

memory.

16-Bit Internal DMA Port for High Speed Access to

On-Chip Memory (Mode Selectable)

4 MByte Memory Interface for Storage of Data Tables

and Program Overlays (Mode Selectable)

8-Bit DMA to Byte Memory for Transparent Program

and Data Memory Transfers (Mode Selectable)

I/O Memory Interface with 2048 Locations Supports

Parallel Peripherals (Mode Selectable)

Programmable Memory Strobe and Separate I/O Memory

Space Permits “Glueless” System Design

Programmable Wait State Generation

Two Double-Buffered Serial Ports with Companding

Hardware and Automatic Data Buffering

Automatic Booting of On-Chip Program Memory from

Byte-Wide External Memory, e.g., EPROM, or

Through Internal DMA Port

Six External Interrupts

13 Programmable Flag Pins Provide Flexible System

Signaling

UART Emulation through Software SPORT Reconfiguration

ICE-Port™ Emulator Interface Supports Debugging in

Final Systems

The ADSP-2185L integrates 80K bytes of on-chip memory

configured as 16K words (24-bit) of program RAM, and 16K

words (16-bit) of data RAM. Power-down circuitry is also pro-

vided to meet the low power needs of battery operated portable

equipment. The ADSP-2185L is available in 100-lead LQFP

package.

In addition, the ADSP-2185L supports instructions which

include bit manipulations—bit set, bit clear, bit toggle, bit test—

ALU constants, multiplication instruction (x squared), biased

rounding, result free ALU operations, I/O memory transfers and

global interrupt masking, for increased flexibility.

Fabricated in a high speed, low power, CMOS process, the

ADSP-2185L operates with a 19 ns instruction cycle time. Ev-

ery instruction can execute in a single processor cycle.

ICE-Port is a trademark of Analog Devices, Inc.

REV. A

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

Fax: 781/326-8703

World Wide Web Site: http://www.analog.com

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与ADSP-2185LBST-133相关器件

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ADSP-2185LBSTZ-133	ADI	IC 24-BIT, 26.3 MHz, OTHER DSP, PQFP100, ROHS COMPLIANT, MS-026BED, LQFP-100, Digital Sign	获取价格
ADSP-2185LBSTZ-1332	ADI	DSP Microcomputer	获取价格
ADSP-2185LBSTZ-160	ADI	IC 24-BIT, 26.3 MHz, OTHER DSP, PQFP100, ROHS COMPLIANT, MS-026BED, LQFP-100, Digital Sign	获取价格
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