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ADSP-2185MBSTZ-266 PDF预览

ADSP-2185MBSTZ-266

更新时间: 2024-11-24 12:53:47
品牌 Logo 应用领域
亚德诺 - ADI 电脑
页数 文件大小 规格书
40页 294K
描述
DSP Microcomputer

ADSP-2185MBSTZ-266 数据手册

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DSP  
Microcomputer  
a
ADSP-2185M  
FEATURES  
System Interface  
Performance  
Flexible I/O Structure Allows 2.5 V or 3.3 V Operation;  
All Inputs Tolerate up to 3.6 V Regardless of Mode  
16-Bit Internal DMA Port for High-Speed Access to  
On-Chip Memory (Mode Selectable)  
4 MByte Memory Interface for Storage of Data Tables  
and Program Overlays (Mode Selectable)  
8-Bit DMA to Byte Memory for Transparent Program  
and Data Memory Transfers (Mode Selectable)  
I/O Memory Interface with 2048 Locations Supports  
Parallel Peripherals (Mode Selectable)  
Programmable Memory Strobe and Separate I/O  
Memory Space Permits “Glueless” System Design  
Programmable Wait State Generation  
Two Double-Buffered Serial Ports with Companding  
Hardware and Automatic Data Buffering  
Automatic Booting of On-Chip Program Memory from  
Byte-Wide External Memory, e.g., EPROM, or  
through Internal DMA Port  
13.3 ns Instruction Cycle Time @ 2.5 V (Internal),  
75 MIPS Sustained Performance  
Single-Cycle Instruction Execution  
Single-Cycle Context Switch  
3-Bus Architecture Allows Dual Operand Fetches in  
Every Instruction Cycle  
Multifunction Instructions  
Power-Down Mode Featuring Low CMOS Standby Power  
Dissipation with 200 CLKIN Cycle Recovery from  
Power-Down Condition  
Low Power Dissipation in Idle Mode  
Integration  
ADSP-2100 Family Code Compatible (Easy to Use  
Algebraic Syntax), with Instruction Set Extensions  
80K Bytes of On-Chip RAM, Configured as  
16K Words Program Memory RAM  
16K Words Data Memory RAM  
Dual-Purpose Program Memory for Both Instruction and  
Data Storage  
Six External Interrupts  
13 Programmable Flag Pins Provide Flexible System  
Signaling  
UART Emulation through Software SPORT Reconfiguration  
ICE-Port™ Emulator Interface Supports Debugging in  
Final Systems  
Independent ALU, Multiplier/Accumulator, and Barrel  
Shifter Computational Units  
Two Independent Data Address Generators  
Powerful Program Sequencer Provides Zero Overhead  
Looping Conditional Instruction Execution  
Programmable 16-Bit Interval Timer with Prescaler  
100-Lead LQFP and 144-Ball Mini-BGA  
FUNCTIONAL BLOCK DIAGRAM  
POWER-DOWN  
CONTROL  
FULL MEMORY MODE  
MEMORY  
DATA ADDRESS  
GENERATORS  
PROGRAMMABLE  
EXTERNAL  
ADDRESS  
BUS  
PROGRAM  
MEMORY  
16K 24 BIT  
DATA  
PROGRAM  
SEQUENCER  
I/O  
MEMORY  
AND  
FLAGS  
DAG1 DAG2  
؋
16K 
؋
 16 BIT  
EXTERNAL  
DATA  
BUS  
PROGRAM MEMORY ADDRESS  
BYTE DMA  
DATA MEMORY ADDRESS  
PROGRAM MEMORY DATA  
DATA MEMORY DATA  
CONTROLLER  
OR  
EXTERNAL  
DATA  
BUS  
SERIAL PORTS  
ARITHMETIC UNITS  
TIMER  
SPORT0 SPORT1  
ALU  
MAC  
SHIFTER  
INTERNAL  
DMA  
PORT  
ADSP-2100 BASE  
ARCHITECTURE  
HOST MODE  
ICE-Port is a trademark of Analog Devices, Inc.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 2000  

ADSP-2185MBSTZ-266 替代型号

型号 品牌 替代类型 描述 数据表
ADSP-2185MBST-266 ADI

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