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ADSP-2186BST-160 PDF预览

ADSP-2186BST-160

更新时间: 2024-01-16 06:13:49
品牌 Logo 应用领域
亚德诺 - ADI 微控制器和处理器外围集成电路数字信号处理器电脑时钟
页数 文件大小 规格书
36页 239K
描述
DSP Microcomputer

ADSP-2186BST-160 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:METRIC, PLASTIC, TQFP-100
针数:100Reach Compliance Code:not_compliant
ECCN代码:3A991.A.2HTS代码:8542.31.00.01
风险等级:5.65Is Samacsys:N
地址总线宽度:14桶式移位器:YES
位大小:16边界扫描:NO
最大时钟频率:40 MHz外部数据总线宽度:24
格式:FIXED POINT内部总线架构:MULTIPLE
JESD-30 代码:S-PQFP-G100JESD-609代码:e0
低功率模式:YES端子数量:100
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP100,.63SQ,20封装形状:SQUARE
封装形式:FLATPACK峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
RAM(字数):8196子类别:Digital Signal Processors
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIEDuPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches:1

ADSP-2186BST-160 数据手册

 浏览型号ADSP-2186BST-160的Datasheet PDF文件第2页浏览型号ADSP-2186BST-160的Datasheet PDF文件第3页浏览型号ADSP-2186BST-160的Datasheet PDF文件第4页浏览型号ADSP-2186BST-160的Datasheet PDF文件第5页浏览型号ADSP-2186BST-160的Datasheet PDF文件第6页浏览型号ADSP-2186BST-160的Datasheet PDF文件第7页 
a
DSP Microcomputer  
ADSP-2186  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
PERFORMANCE  
25 ns Instruction Cycle Time 40 MIPS Sustained  
Performance  
Single-Cycle Instruction Execution  
Single-Cycle Context Switch  
POWER-DOWN  
CONTROL  
FULL MEMORY  
MODE  
MEMORY  
PROGRAMMABLE  
DATA ADDRESS  
GENERATORS  
I/O  
8K 
؋
 24  
PROGRAM  
MEMORY  
8K 
؋
 16  
DATA  
MEMORY  
EXTERNAL  
ADDRESS  
BUS  
PROGRAM  
SEQUENCER  
AND  
FLAGS  
DAG 1 DAG 2  
EXTERNAL  
DATA  
3-Bus Architecture Allows Dual Operand Fetches in  
Every Instruction Cycle  
Multifunction Instructions  
Power-Down Mode Featuring Low CMOS Standby  
Power Dissipation with 100 Cycle Recovery from  
Power-Down Condition  
PROGRAM MEMORY ADDRESS  
DATA MEMORY ADDRESS  
BUS  
BYTE DMA  
CONTROLLER  
PROGRAM MEMORY DATA  
DATA MEMORY DATA  
OR  
EXTERNAL  
DATA  
BUS  
ARITHMETIC UNITS  
ALU SHIFTER  
SERIAL PORTS  
SPORT 0 SPORT 1  
TIMER  
Low Power Dissipation in Idle Mode  
INTERNAL  
DMA  
PORT  
MAC  
INTEGRATION  
ADSP-2100 Family Code Compatible, with Instruction  
Set Extensions  
ADSP-2100 BASE  
ARCHITECTURE  
HOST MODE  
40K Bytes of On-Chip RAM, Configured as  
8K Words On-Chip Program Memory RAM and  
8K Words On-Chip Data Memory RAM  
Dual Purpose Program Memory for Both Instruction  
and Data Storage  
Automatic Booting of On-Chip Program Memory from  
Byte-Wide External Memory, e.g., EPROM, or  
Through Internal DMA Port  
Six External Interrupts  
13 Programmable Flag Pins Provide Flexible System  
Signaling  
Independent ALU, Multiplier/Accumulator and Barrel  
Shifter Computational Units  
UART Emulation through Software SPORT Reconfiguration  
ICE-Port™ Emulator Interface Supports Debugging  
in Final Systems  
Two Independent Data Address Generators  
Powerful Program Sequencer Provides  
Zero Overhead Looping Conditional Instruction  
Execution  
Programmable 16-Bit Interval Timer with Prescaler  
100-Lead LQFP  
GENERAL DESCRIPTION  
The ADSP-2186 is a single-chip microcomputer optimized for  
digital signal processing (DSP) and other high speed numeric  
processing applications.  
144-Ball Mini-BGA  
SYSTEM INTERFACE  
16-Bit Internal DMA Port for High Speed Access to  
On-Chip Memory (Mode Selectable)  
4 MByte Byte Memory Interface for Storage of Data  
Tables and Program Overlays  
8-Bit DMA to Byte Memory for Transparent Program  
and Data Memory Transfers (Mode Selectable)  
I/O Memory Interface with 2048 Locations Supports  
Parallel Peripherals (Mode Selectable)  
Programmable Memory Strobe and Separate I/O Memory  
Space Permits “Glueless” System Design  
(Mode Selectable)  
Programmable Wait State Generation  
Two Double-Buffered Serial Ports with Companding  
Hardware and Automatic Data Buffering  
The ADSP-2186 combines the ADSP-2100 family base archi-  
tecture (three computational units, data address generators and  
a program sequencer) with two serial ports, a 16-bit internal  
DMA port, a byte DMA port, a programmable timer, Flag I/O,  
extensive interrupt capabilities and on-chip program and data  
memory.  
The ADSP-2186 integrates 40K bytes of on-chip memory con-  
figured as 8K words (24-bit) of program RAM and 8K words  
(16-bit) of data RAM. Power-down circuitry is also provided to  
meet the low power needs of battery operated portable equip-  
ment. The ADSP-2186 is available in 100-lead LQFP and  
144-Ball Mini-BGA packages.  
In addition, the ADSP-2186 supports new instructions, which  
include bit manipulations—bit set, bit clear, bit toggle, bit test—  
new ALU constants, new multiplication instruction (x squared),  
biased rounding, result free ALU operations, I/O memory trans-  
fers and global interrupt masking for increased flexibility.  
ICE-Port is a trademark of Analog Devices, Inc.  
All trademarks are the property of their respective holders.  
REV. A  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 1999  

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