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ADSP-21261SKSTZ150

更新时间： 2024-01-26 15:18:13
品牌 Logo 应用领域
亚德诺 - ADI 微控制器和处理器外围集成电路数字信号处理器时钟
页数 文件大小 规格书
44页 1232K
描述
SHARC Embedded Processor

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中文翻译

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ADSP-21261SKSTZ150 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFP
包装说明：LFQFP, QFP144,.87SQ,20针数：144
Reach Compliance Code：compliantECCN代码：3A991.A.2
HTS代码：8542.31.00.01风险等级：8.19
Is Samacsys：N其他特性：ALSO REQUIRES 3.3V SUPPLY
地址总线宽度：16桶式移位器：YES
位大小：32边界扫描：YES
最大时钟频率：50 MHz外部数据总线宽度：16
格式：FLOATING POINT内部总线架构：MULTIPLE
JESD-30 代码：S-PQFP-G144JESD-609代码：e3
长度：20 mm低功率模式：NO
湿度敏感等级：3端子数量：144
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：LFQFP
封装等效代码：QFP144,.87SQ,20封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度（摄氏度）：260
电源：1.2,3.3 V认证状态：Not Qualified
RAM（字数）：49152座面最大高度：1.6 mm
子类别：Digital Signal Processors最大供电电压：1.26 V
最小供电电压：1.14 V标称供电电压：1.2 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：40
宽度：20 mmuPs/uCs/外围集成电路类型：DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches：1

ADSP-21261SKSTZ150 数据手册

 浏览型号ADSP-21261SKSTZ150的Datasheet PDF文件第7页浏览型号ADSP-21261SKSTZ150的Datasheet PDF文件第8页浏览型号ADSP-21261SKSTZ150的Datasheet PDF文件第9页浏览型号ADSP-21261SKSTZ150的Datasheet PDF文件第11页浏览型号ADSP-21261SKSTZ150的Datasheet PDF文件第12页浏览型号ADSP-21261SKSTZ150的Datasheet PDF文件第13页 
ADSP-21261  
EVALUATION KIT  
ADDITIONAL INFORMATION  
Analog Devices offers a range of EZ-KIT Lite®† evaluation plat-  
forms to use as a cost-effective method to learn more about  
developing or prototyping applications with Analog Devices  
processors, platforms, and software tools. Each EZ-KIT Lite  
includes an evaluation board along with an evaluation suite of  
the VisualDSP++ development and debugging environment  
with the C/C++ compiler, assembler, and linker. Also included  
are sample application programs, power supply, and a USB  
cable. All evaluation versions of the software tools are limited  
for use only with the EZ-KIT Lite product.  
This data sheet provides a general overview of the ADSP-21261  
architecture and functionality. For detailed information on the  
ADSP-2126x family core architecture and instruction set, refer  
to the ADSP-2126x DSP Core Manual and the ADSP-21160  
SHARC DSP Instruction Set Reference.  
The USB controller on the EZ-KIT Lite board connects the  
board to the USB port of the user’s PC, enabling the Visu-  
alDSP++ evaluation suite to emulate the on-board processor in-  
circuit. This permits the customer to download, execute, and  
debug programs for the EZ-KIT Lite system. It also allows in-  
circuit programming of the on-board flash device to store user-  
specific boot code, enabling the board to run as a standalone  
unit, without being connected to the PC.  
With a full version of VisualDSP++ installed (sold separately),  
engineers can develop software for the EZ-KIT Lite or any cus-  
tom-defined system. Connecting an Analog Devices JTAG  
emulator to the EZ-KIT Lite board enables high speed, nonin-  
trusive emulation.  
DESIGNING AN EMULATOR-COMPATIBLE DSP  
BOARD (TARGET)  
The Analog Devices family of emulators are tools that every  
DSP developer needs to test and debug hardware and software  
systems. Analog Devices has supplied an IEEE 1149.1 JTAG test  
access port (TAP) on each JTAG DSP. Nonintrusive in-circuit  
emulation is assured by the use of the processor’s JTAG inter-  
face—the emulator does not affect target system loading or  
timing. The emulator uses the TAP to access the internal fea-  
tures of the DSP, allowing the developer to load code, set  
breakpoints, observe variables, observe memory, and examine  
registers. The DSP must be halted to send data and commands,  
but once an operation has been completed by the emulator, the  
DSP system is set running at full speed with no impact on sys-  
tem timing.  
To use these emulators, the target board must include a header  
that connects the DSP’s JTAG port to the emulator.  
For details on target board design issues including mechanical  
layout, single processor connections, multiprocessor scan  
chains, signal buffering, signal termination, and emulator pod  
logic, see the EE-68: Analog Devices JTAG Emulation Technical  
Reference on the Analog Devices website (www.analog.com)—  
use site search on “EE-68.” This document is updated regularly  
to keep pace with improvements to emulator support.  
† EZ-KIT Lite is a registered trademark of Analog Devices, Inc.  
Rev. 0  
|
Page 10 of 44 | March 2006  
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