8-Bit Programmable 2- to 4-Phase
Synchronous Buck Controller
ADP3192A
FUNCTIONAL BLOCK DIAGRAM
FEATURES
VCC
31
RT RAMPADJ
12 13
Selectable 2-, 3-, or 4-phase operation at up to
1 MHz per phase
7.7 mV worst-case differential sensing error over
temperature
Logic-level PWM outputs for interface to external high
power drivers
Fast enhanced PWM (FEPWM) flex mode for excellent load
transient performance
Active current balancing between all output phases
Built-in power-good/crowbar blanking supports on-the-fly
VID code changes
Digitally programmable 0.5 V to 1.6 V output supports both
VR10.x and VR11 specifications
SHUNT
REGULATOR
OSCILLATOR
19
OD
UVLO
SHUTDOWN
SET EN
RESET
+
18
1
GND
EN
30
29
28
CMP
PWM1
PWM2
PWM3
–
–
+
850mV
+
RESET
CMP
–
DAC
+ 150mV
+
–
+
RESET
CMP
–
2/3/4-PHASE
CSREF
DRIVER LOGIC
RESET
27 PWM4
+
–
+
CMP
–
DAC
– 350mV
CURRENT
LIMIT
DELAY
2
PWRGD
CROWBAR
25
24
23
22
SW1
SW2
SW3
Programmable short-circuit protection with programmable
latch-off delay
10
9
TTSENSE
VRHOT
THERMAL
THROTTLING
CONTROL
VRFAN
8
SW4
17
15
CSCOMP
CSREF
11
7
ILIMIT
CURRENT
+
–
APPLICATIONS
MEASUREMENT
AND LIMIT
DELAY
16
21
CSSUM
IMON
Desktop PC power supplies for next generation
Intel® processors
VRM modules
20
5
IREF
–
+
4
FB
COMP
+
PRECISION
14
LLSET
REFERENCE
–
BOOT
VOLTAGE
AND
SOFT START
CONTROL
3
FBRTN
VIDSEL
6
SS
VID DAC
40
ADP3192A
32
33
34
35
36
37
38
39
VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0
Figure 1.
GENERAL DESCRIPTION
The ADP3192A1 is a highly efficient, multiphase, synchronous
buck-switching regulator controller optimized for converting a
12 V main supply into the core supply voltage required by high
performance Intel processors. It uses an internal 8-bit DAC to read
a voltage identification (VID) code directly from the processor,
which is used to set the output voltage between 0.5 V and 1.6 V.
The ADP3192A also includes programmable no load offset and
slope functions to adjust the output voltage as a function of the
load current, optimally positioning it for a system transient. In
addition, the ADP3192A provides accurate and reliable short-
circuit protection, adjustable current limiting, and a delayed
power-good output that accommodates on-the-fly output
voltage changes requested by the CPU.
This device uses a multimode PWM architecture to drive the
logic-level outputs at a programmable switching frequency that
can be optimized for VR size and efficiency. The phase relation-
ship of the output signals can be programmed to provide 2-, 3-,
or 4-phase operation, allowing for the construction of up to
four complementary buck-switching stages.
The ADP3192A has a built-in shunt regulator that allows the part
to be connected to the 12 V system supply through a series resistor.
The ADP3192A is specified over the extended commercial
temperature range of 0°C to 85°C and is available in a
40-lead LFCSP.
1 Protected by U.S. Patent Number 6,683,441; other patents pending.
Rev. 0
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
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