1.2 A, Ultralow Noise,
High PSRR, RF Linear Regulator
ADP7157
Data Sheet
FEATURES
Input voltage range: 2.3 V to 5.5 V
Adjustable output voltage range (VOUT): 1.2 V to 3.3 V
Maximum load current: 1.2 A
Low noise
0.9 µV rms typical output noise from 100 Hz to 100 kHz
1.6 µV rms typical output noise from 10 Hz to 100 kHz
Noise spectral density: 1.7 nV/√Hz from 10 kHz to 1 MHz
Power supply rejection ratio (PSRR)
82 dB from 1 kHz to 100 kHz
TYPICAL APPLICATION CIRCUIT
ADP7157
V
= 3.8V
V
= 3.3V
IN
OUT
VIN
VOUT
VOUT_SENSE
REF
C
10µF
C
OUT
10µF
IN
ON
OFF
EN
C
REF
1µF
R1
BYP
C
BYP
1µF
V
= 1.2V × (R1 + R2)/R2
OUT
REF_SENSE
R2
1kΩ < R2 < 200kΩ
VREG
C
REG
1µF
55 dB at 1 MHz
GND
Dropout voltage: 120 mV typical at IOUT = 1.2 A, VOUT = 3.3 V
Initial accuracy: 0.6% at ILOAD = 10 mA
Accuracy over line, load, and temperature: 1.5%
Figure 1. Regulated 3.3 V Output from a 3.8 V Input
Operating supply current (IGND
4.0 mA typical at 0 µA
)
7.0 mA typical at 1.2 A
Low shutdown current: 0.2 μA typical
Stable with a 10 µF ceramic output capacitor
10-lead, 3 mm × 3 mm LFCSP and 8-lead SOIC packages
Precision enable
Table 1. Related Devices
Input
Output
Current
Fixed/
Adjustable
Supported by ADIsimPower tool
Model
Voltage
Package
APPLICATIONS
2.3 V to
5.5 V
2 A
Fixed
10-lead LFCSP/
8-lead SOIC
ADP7159,
ADP7158
ADP7156
Regulation to noise sensitive applications: phase-locked
loops (PLLs), voltage controlled oscillators (VCOs), and
PLLs with integrated VCOs
2.3 V to
5.5 V
1.2 A
Fixed/
Adjustable
10-lead LFCSP/
8-lead SOIC
ADM7150, 4.5 V to
ADM7151 16 V
ADM7154, 2.3 V to
800 mA
600 mA
200 mA
Fixed/
Adjustable
Fixed/
Adjustable
8-lead LFCSP/
8-lead SOIC
8-lead LFCSP/
8-lead SOIC
6-lead LFCSP/
5-lead TSOT
Communications and infrastructure
Backhaul and microwave links
ADM7155
5.5 V
GENERAL DESCRIPTION
ADM7160
2.2 V to
5.5 V
Fixed
The ADP7157 is an adjustable linear regulator that operates from
2.3 V to 5.5 V and provides up to 1.2 A of output current. Output
voltages from 1.2 V to 3.3 V are possible depending on the model.
Using an advanced proprietary architecture, the device provides
high power supply rejection and ultralow noise, achieving excellent
line and load transient response with only a 10 µF ceramic
output capacitor.
1k
100
10
C
= 1µF
BYP
BYP
BYP
BYP
C
C
C
= 10µF
= 100µF
= 1000µF
The ADP7157 is available in four models that optimize power
dissipation and PSRR performance as a function of the input
and output voltage. See Table 9 and Table 10 for selection guides.
1
The typical output noise the ADP7157 regulator is 0.9 μV rms from
100 Hz to 100 kHz and 1.7 nV/√Hz for noise spectral density from
10 kHz to 1 MHz. The ADP7157 is available in 10-lead, 3 mm ×
3 mm LFCSP and 8-lead SOIC packages, making it not only a
very compact solution, but also providing excellent thermal
performance for applications requiring up to 1.2 A of output
current in a small, low profile footprint.
0.1
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 2. Noise Spectral Density at Different Values of CBYP, VOUT = 3.3 V
Rev. A
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