Datasheet > ADL5391ACPZ-WP

ADL5391ACPZ-WP

更新时间： 2024-01-15 10:25:19

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
16页	430K
描述
DC to 2.0 GHz Multiplier

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ADL5391ACPZ-WP 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFN
包装说明：	HVQCCN,	针数：	16
Reach Compliance Code：	compliant	ECCN代码：	5A991.B
HTS代码：	8542.39.00.01	风险等级：	5.09
JESD-30 代码：	S-XQCC-N16	JESD-609代码：	e3
长度：	3 mm	湿度敏感等级：	3
功能数量：	1	端子数量：	16
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	HVQCCN
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	认证状态：	Not Qualified
座面最大高度：	0.9 mm	标称供电电压：	5 V
表面贴装：	YES	技术：	BIPOLAR
电信集成电路类型：	TELECOM CIRCUIT	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn)	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	40	宽度：	3 mm
Base Number Matches：	1

ADL5391ACPZ-WP 数据手册

ADL5391

The dc component of the output is related to the square of both

the offset (OFST) and the signal input amplitude (E). The offset

can be found in Figure 4 and is approximately ±0 mV. The

second harmonic output grows with the square of the input

amplitude, and the signal bleedthrough grows proportionally

with the input signal. For smaller signal amplitudes, the signal

bleedthrough can be higher than the second harmonic

component. As the input amplitude increases, the second

harmonic component grows much faster than the signal

bleedthrough and becomes the dominant signal at the output.

If the X and Y inputs are driven too hard, third harmonic

components will also increase.

Matching the Input/Output

The input and output impedance’s of the ADL5391 change over

frequency, making it difficult to match over a broad frequency

range (see Figure 15 and Figure 16). The evaluation board is

matched for lower frequency operation, and the impedance

change at higher frequencies causes the change in gain seen in

Figure 6. If desired, the user of the ADL5391 can design a

matching network to fit their application.

Wideband Voltage-Controlled Amplifier/Amplitude

Modulator

Most of the data for the ADL5391 was collected by using it as a

fast reacting analog VGA. Either X or Y inputs can be used for

the RF input (and the other as the very fast analog control),

because either input can be used from dc to ± GHz. There is a

linear relationship between the analog control and the output of

the multiplier in the VGA mode. Figure 6 and Figure 7 show the

dynamic range available in VGA mode (without optimizing the

dc offsets).

For best performance creating harmonics, the ADL5391 should

be driven differentially. Figure 17 shows the performance of the

ADL5391 when used as a harmonic generator (the evaluation

board was used with R9 and R10 removed and R± = 56.± Ω). If

dc operation is necessary, the ADL5391 can be driven single

ended (without the dc blocks). The flatness of the response over

a broad frequency range depends on the input/output match.

The fundamental bleed through not only depends on the

amount of power put into the device but also depends on

matching the unused differential input/output to the same

impedance as the used input/output. Figure 18 shows the

performance of the ADL5391 when driven single ended

(without ac coupling capacitors), and Figure 19 shows the

schematic of the setup. A resistive input/output match were

used to match the input from dc to 1 GHz and the output from

dc to ± GHz. Reactive matching can be used for more narrow

frequency ranges. When matching the input/output of the

ADL5391, care needs to be taken not to load the ADL5391 too

heavily; the maximum reference current available is 50 mA.

The speed of the ADL5391 in VGA mode allows it to be used as

an amplitude modulator. Either or both inputs can have

modulation or CW applied. AM modulation is achieved by

feeding CW into X (or Y) and adding AM modulation to the Y

(or X) input.

Squaring and Frequency Doubling

Amplitude domain squaring of an input signal, E, is achieved

simply by connecting the X and Y inputs in parallel to produce

an output of E^±. The input can be single-ended, differential, or

through a balun (frequency range and dynamic range can be

limited if used single ended).

–15

When the input is a sine wave Esin(ωt), a signal squarer behaves

as a frequency doubler, because

–20

SECOND HARMONIC GAIN

–25

E²

[

Esin(ωt) ^±

]

(1−cos

(

±ωt

)

(3)

–30

–35

BLEEDTHRU GAIN

Ideally, when used for squaring and frequency doubling, there is

no component of the original signals on the output. Because of

internal offsets, this is not the case. If Equation 3 were rewritten

to include theses offsets, it could separate into three output

terms (Equation 4).

–40

–45

–50

–55

THIRD HARMONIC GAIN

–60

–65

[

Esin(ωt)+ OFST

]

[

Esin(ωt)+OFST =

]

E^±

(4)

⎛

⎞

10 100 200 300 400 500 600 700 800 900 1000

FREQUENCY (MHz)

⎜

⎟

[

cos(±ωt)

]

+±Esin(ωt)OFST + OFST +

⎜

⎝

⎠

Figure 17. ADL5391 Used as a Harmonic Generator

where:

The dc component is OFST^±+ E^±/±.

The input signal bleedthrough is ±Esin(ωt)OFST.

The input squared is E^±/±[cos(±ωt)].

Rev. 0 | Page 11 of 16

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ADL5391ACPZ-WP 替代型号

型号	品牌	替代类型	描述	数据表
ADL5391ACPZ-R7	ADI	完全替代	DC to 2.0 GHz Multiplier
ADL5391ACPZ-R2	ADI	完全替代	DC to 2.0 GHz Multiplier

与ADL5391ACPZ-WP相关器件

型号	品牌	获取价格	描述	数据表
ADL5391-EVALZ	ADI	获取价格	DC to 2.0 GHz Multiplier
ADL5500	ADI	获取价格	100 MHz to 6 GHz TruPwr Detector
ADL5500ACBZ-P2	ADI	获取价格	100 MHz to 6 GHz TruPwr Detector
ADL5500ACBZ-P3	ADI	获取价格	100 <span class="noTransform">MHz TO 6 GHz TruPwr™</span>
ADL5500ACBZ-P7	ADI	获取价格	100 MHz to 6 GHz TruPwr Detector
ADL5500-EVALZ	ADI	获取价格	100 MHz to 6 GHz TruPwr Detector
ADL5501	ADI	获取价格	50 MHz to 4 GHz TruPwr Detector
ADL5501_09	ADI	获取价格	50 MHz to 6 GHz TruPwr Detector
ADL5501AKSZ-R2	ADI	获取价格	50 MHz to 4 GHz TruPwr Detector
ADL5501AKSZ-R21	ADI	获取价格	50 MHz to 6 GHz TruPwr Detector

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