800 MHz to 3800 MHz
Crest Factor Detector
ADL5502
Preliminary Technical Data
FEATURES
True rms response detector
Envelope output with peak hold option
Excellent temperature stability
0.2ꢀ dB rms detection accuracy vs. temperature
0.2ꢀ dB envelope detection accuracy vs. temperature;
over the top 1ꢀ dB of the input range
Over 30 dB input power dynamic range, inclusive of crest
factor, up to 3.8 GHz
RF bandwidths from 800 MHz to 3.8 GHz
Envelope bandwidths of 10 MHz
ꢀ00 Ω input impedance
Single-supply operation: 2.7 V to 3.ꢀ V
Low power: ꢀ mA at 3 V supply
RoHS compliant
Figure 1.
APPLICATIONS
Power and envelope measurement of W-CDMA, CDMA2000,
and QPSK-/QAM-based OFDM, and other complex
modulation waveforms
RF transmitter or receiver power and envelope measurement
GENERAL DESCRIPTION
The ADL5502 is a mean-responding power detector in
combination with an envelope detector to accurately determine
the crest factor of a modulated signal. It can be used in high
frequency receiver and transmitter signal chains from 800 MHz
to 3.8 GHz with envelope bandwidths over 10 MHz. Requiring
only a single supply between 2.7 V and 3.5 V, the detector draws
less than 5 mA. The input is internally ac-coupled and has a
nominal input impedance of 500 Ω.
The ADL5502 is a highly accurate, easy to use means of
determining the peak to average value of complex waveforms.
It can be used for crest factor measurements of both simple and
complex waveforms, but is particularly useful for measuring
high crest factor (high peak-to-rms ratio) signals, such as
CDMA2000, W-CDMA, and QPSK/QAM-based OFDM
waveforms. The peak hold function allows the capture of short
peaks in the envelope with lower sampling rate ADC’s.
The rms output is a linear-responding dc voltage with a
conversion gain of 2.0 V/Vrms at 900 MHz. The envelope
output with a conversion gain of 1.4 V/V can be toggled
between real-time envelope measurement or peak hold with less
than TBD mV droop in over 200 μS.
The crest factor detector operates from −40°C to +85°C and is
available in an 8-ball, 1.5 mm × 1.5 mm wafer-level chip scale
package. It is fabricated on a high fT silicon BiCMOS process.
Rev. PrD (04/20/2008)
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