5秒后页面跳转
ADC1413D105HN PDF预览

ADC1413D105HN

更新时间: 2024-11-14 06:36:19
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
38页 207K
描述
Dual 14 bits ADC; 65, 80, 105 or 125 Msps; serial JESD204A interface

ADC1413D105HN 数据手册

 浏览型号ADC1413D105HN的Datasheet PDF文件第2页浏览型号ADC1413D105HN的Datasheet PDF文件第3页浏览型号ADC1413D105HN的Datasheet PDF文件第4页浏览型号ADC1413D105HN的Datasheet PDF文件第5页浏览型号ADC1413D105HN的Datasheet PDF文件第6页浏览型号ADC1413D105HN的Datasheet PDF文件第7页 
ADC1413D065/080/105/125  
Dual 14 bits ADC; 65, 80, 105 or 125 Msps; serial JESD204A  
interface  
Rev. 02 — 4 June 2009  
Objective data sheet  
1. General description  
The ADC1413D is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for  
high dynamic performances and low power at sample rates up to 125 Msps. Pipelined  
architecture and output error correction ensure the ADC1413D is accurate enough to  
guarantee zero missing codes over the entire operating range. Supplied from a 3.3 V  
source for analog and a 1.8 V source for the output driver, it has two serial outputs,  
because of the two lanes of differential outputs, which are compliant with the JESD204A  
standard. An integrated SPI (Serial Peripheral Interface) allows the user to easily  
configure the ADC. A set of IC configurations is also available via the binary level control  
pins taken, which are used at power-up. The device also includes a programmable gain  
amplifier with flexible input voltage range.  
Excellent dynamic performance is maintained from the baseband to input frequencies of  
170 MHz or more, making the ADC1413D ideal for use in communications, imaging and  
medical applications.  
2. Features  
I SNR, 73 dB  
I Input bandwidth, 600 MHz  
I Power dissipation, 995 mW at 80 Msps  
I SPI interface  
I SFDR, 90 dBc  
I Sample rate up to 125 Msps  
I Dual channel 14-bit pipelined ADC core I Duty cycle stabilizer  
I 3.3 V, 1.8 V single supplies  
I High IF capability  
I Flexible input voltage range:  
1 V (p-p) to 2 V (p-p) with 6 dB  
programmable fine gain  
I Offset binary, 2’s complement, gray  
code  
I 2 configurable serial outputs  
I Compliant with JESD204A serial  
transmission standard  
I Power-down and Sleep modes  
I HVQFN56 package  
I INL ± 1 LSB; DNL ± 0.5 LSB  
3. Applications  
I Wireless and wired broadband communications  
I Spectral analysis  
I Portable instrumentation  
I Imaging systems  
I Ultrasound equipment  

与ADC1413D105HN相关器件

型号 品牌 获取价格 描述 数据表
ADC1413D105HN/C1 NXP

获取价格

Dual 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; serial JESD204A interface
ADC1413D105HN-C1 IDT

获取价格

Dual 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; serial JESD204A interface
ADC1413D125C1 NXP

获取价格

Dual 14 bits ADC; 65, 80, 105 or 125 Msps; serial JESD204A interface
ADC1413D125HN NXP

获取价格

Dual 14 bits ADC; 65, 80, 105 or 125 Msps; serial JESD204A interface
ADC1413D125HN/C1 NXP

获取价格

Dual 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; serial JESD204A interface
ADC1413D125HN-C1 IDT

获取价格

Dual 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; serial JESD204A interface
ADC1413S NXP

获取价格

Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; serial JESD204A interface
ADC1413S IDT

获取价格

Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; serial JESD204A interface
ADC1413S065HN NXP

获取价格

Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; serial JESD204A interface
ADC1413S065HN/C1 NXP

获取价格

IC 1-CH 14-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC32, 7 X 7 MM, 0.80 MM HEIGHT, PL