Datasheet > ADC1341X_PC

ADC1341X_PC

更新时间： 2024-11-25 23:27:51

品牌	Logo	应用领域
其他 - ETC		PC
页数	文件大小	规格书
10页	265K
描述
ADC1341X_PC 8-Channel 10-BIT 500KSPS ADC\|Data Sheet

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中文翻译

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数据手册

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ADC1341X_PC 数据手册

8-Channel 10-BIT 500KSPS ADC

ADC1341X_PC

GENERAL DESCRIPTION

FEATURES

• Resolution : 10-bit

The ADC1341X_PC is

CMOS 3.3V 10-bit

It converts the

• Maximum Conversion Rate : 500KSPS

• Main Clock : 2.5MHz (max.)

analog-to-digital converter (ADC).

analog input signal into 10-bit binary digital codes at

a maximum conversion rate of 500KSPS with 2.5MHz

clock.

• Power Supply : 3.3V ±0.3V

• Total Current : 20uA (Standby Mode)

2.5mA (Normal Operation)

The device is a recycling type monolithic ADC with

an on-chip sample-and-hold function. The ADC has

power down mode.

• Input Range : 0.0V ~ 3.3V (3.3V_P-P)

• Differential Linearity Error : ±1.0 LSB

• Integral Linearity Error : ±2.0 LSB

• Signal to Noise & Distortion Ratio : 54dB (Typ.)

• Digital Output : CMOS Level

TYPICAL APPLICATIONS

• Operating Temperature Range : -40 °C ~ 85 °C

MICOM Interface

Portable Equipment

Low-Power Application

FUNCTIONAL BLOCK DIAGRAM

ANALOG

AIN[7:0]

MUX

MDAC1

MDAC2

SEL[2:0]

MAIN

STBY

BIAS

3.3V 1.2V

VREF

AGND

REF

GEN

Level

Shfiter

FLASH1

FLASH2

CML

GEN

DIGITAL

LOGIC

DO[9:0]

EOC

CLOCK

GEN

CKIN

STC

Ver 1.0 (Apr. 2002)

This datasheet is a preliminary version. No responsibility is assumed by SEC for its

use nor for any infringements of patents or other rights of third parties that may result

from its use. The content of this data sheet is subject to change without any notice.

SAMSUNG ELECTRONICS Co. LTD

12 3 4 5 6 7...10

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