Datasheet > ADC12DL066_08

ADC12DL066_08

更新时间： 2024-02-24 02:09:42

品牌	Logo	应用领域
美国国家半导体 - NSC		转换器
页数	文件大小	规格书
24页	503K
描述
Dual 12-Bit, 66Msps, 450MHz Input Bandwidth A/D Converter w/Internal Reference

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ADC12DL066_08 数据手册

February 1, 2008

ADC12DL066

Dual 12-Bit, 66 Msps, 450 MHz Input Bandwidth A/D

Converter w/Internal Reference

General Description

Features

The ADC12DL066 is a dual, low power monolithic CMOS

analog-to-digital converter capable of converting analog input

signals into 12-bit digital words at 66 Megasamples per sec-

ond (Msps), minimum. This converter uses a differential,

pipeline architecture with digital error correction and an on-

chip sample-and-hold circuit to minimize die size and power

consumption while providing excellent dynamic performance

and a 450 MHz Full Power Bandwidth. Operating on a single

3.3V power supply, the ADC12DL066 achieves 10.7 effective

bits and consumes just 686 mW at 66 Msps, including the

reference current. The Power Down feature reduces power

consumption to 75 mW.

Choice of Binary or 2’s complement output format

■

Single +3.3V Supply Operation

Outputs 2.4V to 3.3V Compatible

Pin Compatible with ADC12D040

Power Down Mode

Internal/External Reference

Key Specifications

Resolution

DNL

SNR (f_IN= 10 MHz)

SFDR (f_IN= 10 MHz)

Data Latency

12 Bits

■

±0.5 LSB (typ)

66 dB (typ)

81 dB (typ)

6 Clock Cycles

■

The differential inputs provide a full scale differential input

swing equal to 2 times V_REFwith the possibility of a single-

ended input. Full use of the differential input is recommended

for optimum performance. The digital outputs from the two

ADCs are available on separate 12-bit buses with an output

data format choice of offset binary or two’s complement.

Power Consumption

Operating

Power Down Mode

686 mW (typ)

75 mW (typ)

—

To ease interfacing to lower voltage systems, the digital out-

put driver power pins of the ADC12DL066 can be connected

to a separate supply voltage in the range of 2.4V to the digital

supply voltage.

Applications

Ultrasound and Imaging

■

Instrumentation

This device is available in the 64-lead TQFP package and will

operate over the industrial temperature range of −40°C to

+85°C. An evaluation board is available to ease the evalua-

tion process.

Communications Receivers

Sonar/Radar

xDSL

Cable Modems

DSP Front Ends

Connection Diagram

20055201

TRI-STATE® is a registered trademark of National Semiconductor Corporation.

200552

www.national.com

12 3 4 5 6 7...24

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与ADC12DL066_08相关器件

型号	品牌	获取价格	描述	数据表
ADC12DL066CIVS	NSC	获取价格	Dual 12-Bit, 66 MSPS, 450 MHz Input Bandwidth A/D Converter w/Internal Reference
ADC12DL066CIVS/NOPB	NSC	获取价格	IC DUAL 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP64, TQFP-64, Analog to Di
ADC12DL066CIVS/NOPB	TI	获取价格	双通道、12 位、66MSPS、450MHz 输入带宽模数转换器 (ADC) \| PAG
ADC12DL066EVAL	NSC	获取价格	Dual 12-Bit, 66 MSPS, 450 MHz Input Bandwidth A/D Converter w/Internal Reference
ADC12DL080	NSC	获取价格	Dual 12-Bit, 80 MSPS, A/D Converter for IF Sampling
ADC12DL080	TI	获取价格	selecting amplifiers, adcs, and clocks for high-performance signal paths
ADC12DL080_14	TI	获取价格	Dual 12-Bit, 80 MSPS, A/D Converter for IF Sampling
ADC12DL080CIVS	NSC	获取价格	Dual 12-Bit, 80 MSPS, A/D Converter for IF Sampling
ADC12DL080CIVS/NOPB	TI	获取价格	双通道、12 位、80MSPS、600MHz 输入带宽模数转换器 (ADC) \| PAG
ADC12DL080EVAL	NSC	获取价格	Dual 12-Bit, 80 MSPS, A/D Converter for IF Sampling

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