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ADC0803LD

更新时间： 2024-09-15 22:38:31
品牌 Logo 应用领域
英特矽尔 - INTERSIL 转换器微处理器
页数 文件大小 规格书
16页 252K
描述
8-Bit, Microprocessor- Compatible, A/D Converters

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ADC0803LD 数据手册

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ADC0802, ADC0803  
ADC0804  
8-Bit, Microprocessor-  
August 1997  
Compatible, A/D Converters  
Features  
Description  
• 80C48 and 80C80/85 Bus Compatible - No Interfacing The ADC0802 family are CMOS 8-Bit, successive-approxi-  
Logic Required  
mation A/D converters which use a modified potentiometric  
ladder and are designed to operate with the 8080A control  
bus via three-state outputs. These converters appear to the  
processor as memory locations or I/O ports, and hence no  
interfacing logic is required.  
• Conversion Time < 100µs  
• Easy Interface to Most Microprocessors  
• Will Operate in a “Stand Alone” Mode  
• Differential Analog Voltage Inputs  
• Works with Bandgap Voltage References  
• TTL Compatible Inputs and Outputs  
• On-Chip Clock Generator  
The differential analog voltage input has good common-  
mode-rejection and permits offsetting the analog zero-input-  
voltage value. In addition, the voltage reference input can be  
adjusted to allow encoding any smaller analog voltage span  
to the full 8 bits of resolution.  
• 0V to 5V Analog Voltage Input Range (Single + 5V Supply)  
• No Zero-Adjust Required  
Ordering Information  
o
PART NUMBER  
ADC0802LCN  
ADC0802LCD  
ADC0802LD  
ERROR  
EXTERNAL CONDITIONS  
/2 = 2.500V (No Adjustments)  
TEMP. RANGE ( C)  
PACKAGE  
20 Ld PDIP  
PKG. NO  
E20.3  
F20.3  
1
± / LSB  
V
V
0 to 70  
2
REF  
REF  
DC  
3
± / LSB  
-40 to 85  
-55 to 125  
0 to 70  
20 Ld CERDIP  
20 Ld CERDIP  
20 Ld PDIP  
4
±1 LSB  
F20.3  
1
ADC0803LCN  
ADC0803LCD  
ADC0803LCWM  
ADC0803LD  
± / LSB  
/2 Adjusted for Correct Full Scale  
Reading  
E20.3  
F20.3  
2
3
± / LSB  
-40 to 85  
-40 to 85  
-55 to 125  
0 to 70  
20 Ld CERDIP  
20 Ld SOIC  
4
±1 LSB  
±1 LSB  
±1 LSB  
±1 LSB  
±1 LSB  
M20.3  
F20.3  
20 Ld CERDIP  
20 Ld PDIP  
ADC0804LCN  
ADC0804LCD  
ADC0804LCWM  
V
/2 = 2.500V  
DC  
(No Adjustments)  
E20.3  
F20.3  
REF  
-40 to 85  
-40 to 85  
20 Ld CERDIP  
20 Ld SOIC  
M20.3  
Pinout  
Typical Application Schematic  
ADC0802, ADC0803, ADC0804  
(PDIP, CERDIP)  
1
20  
CS  
V+  
+5V  
10K  
150pF  
TOP VIEW  
2
19  
4
RD  
CLK R  
3
WR  
CLK IN  
5
11  
12  
13  
14  
15  
16  
17  
18  
1
2
3
4
5
6
7
8
9
V+ OR V  
REF  
20  
19  
18  
CS  
RD  
INTR  
DB  
7
CLK R  
DB  
DB  
6
WR  
ANY  
µPROCESSOR  
0 (LSB)  
DB  
DB  
DB  
DB  
DB  
DB  
5
4
3
2
1
0
8-BIT RESOLUTION  
OVER ANY  
DESIRED  
ANALOG INPUT  
VOLTAGE RANGE  
17 DB  
16 DB  
15 DB  
14 DB  
CLK IN  
INTR  
1
6
7
V
(+)  
(-)  
IN  
DIFF  
INPUTS  
2
V
IN  
V
(+)  
(-)  
8
IN  
3
AGND  
/2  
9
V
IN  
V
V
/2  
4
REF  
DGND  
REF  
10  
13  
12  
DB  
DB  
AGND  
/2  
5
V
REF  
6
DGND 10  
11 DB  
7 (MSB)  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
File Number 3094.1  
6-5  
1234567...16

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ADC0803LD 替代型号

型号 品牌 替代类型 描述 数据表
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