ADATE206

更新时间： 2024-09-26 04:04:27

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
16页	304K
描述
500 MHz Dual DCL

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中文翻译

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数据手册

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ADATE206 数据手册

500 MHz Dual DCL

ADATE206

FEATURES

Driver, comparator, and active load

500 MHz toggle rate

Inhibit mode function

Dynamic clamps

Operating voltage range: −1.5 V to 6.5 V

Output voltage swing: 200 mV to 8 V

Four range adjustable slew rate

True/complement data mode bit

100-lead TQFP package, exposed pad

Low per channel power

FUNCTIONAL BLOCK DIAGRAM

VCC

(30, 46)

SHIELDS

(80, 82, 94, 96)

(18, 19, 57, 58, 77, 78, 89, 98, 99)

VIT

VIL

VIH

ADATE206

DR_INV

DR_DATA_P

CLAMPL

CLAMPH

DR_DATA_P_T

DR_DATA_N_T

DR_DATA_N

1.4 W with load off

DRIVER

DUT

LOGIC

1.75 W with load programmed at 20 mA nominal

Low leakage (<10 nA) in High-Z mode

Driver

50 Ω output resistance

1 ns minimum pulse width for a 3 V step

Load: −35 mA to +35 mA maximum current range

DR_EN_P

DR_EN_P_T

DR_EN_N_T

DR_EN_N

VTEN

LDEN

APPLICATIONS

Automatic test equipment

Semiconductor test systems

Board test systems

Instrumentation and characterization equipment

CVH

COMP_H_P

COMP_H_N

COMP_H

CLLM

COMP_L_P

GENERAL DESCRIPTION

COMP_L

COMP_L_N

CVL

The ADATE206 is a complete, single-chip solution that

performs the pin electronics functions of driver, comparator,

and active load (DCL) for ATE applications. The active load can

be powered down if not used.

IOL

LOAD

LOGIC

VCOM

The driver is a proprietary design that features three active

modes: data high mode, data low mode, and term mode, as

well as an inhibit state. The driver has low leakage (<10 nA) in

High-Z mode. The output voltage range is −1.5 V to +6.5 V to

accommodate a wide variety of test devices.

VIOL

VIOH

IOH

GNDREF

TEMP SENSOR

(5 DIODES)

88 TEMP

VEE

(16, 17, 33, 43, 59, 60, 84, 87, 92)

GND

(5, 12, 20, 21, 36, 40, 55, 56, 64, 71, 76, 79, 83, 93, 97,100)

The ADATE206 supports four programmable Tr/Tf times for

applications where slower edge rates are required. The edge rate

selection is done via two static digital CMOS select bits. The

input data to the driver can be inverted using a single CMOS

logic bit. This feature can be used for system calibration or

applications where complement input data is needed.

Figure 1.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

12 3 4 5 6 7...16

中文翻译

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