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AD9944KCPRL

更新时间： 2024-02-19 17:40:42

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
20页	672K
描述
Complete 10-Bit and 12-Bit, 25 MHz CCD Signal Processors

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中文翻译

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数据手册
替代型号

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AD9944KCPRL 数据手册

AD9943/AD9944

SERIAL INTERFACE

TEST BIT

SDATA

SCK

t_DH

D10

D11

t_DS

t_LS

t_LH

NOTES

1. SDATA BITS ARE INTERNALLY LATCHED ON THE RISING EDGES OF SCK.

2. SYSTEM UPDATE OF LOADED REGISTERS OCCURS ON SL RISING EDGE.

3. ALL 12 DATA BITS D0–D11 MUST BE WRITTEN. IF THE REGISTER CONTAINS FEWER THAN 12 BITS, ZEROS SHOULD BE USED

FOR THE UNDEFINED BITS.

4. TEST BIT IS FOR INTERNAL USE ONLY AND MUST BE SET LOW.

Figure 10. Serial Write Operation

DATA FOR STARTING

DATA FOR NEXT

TEST

BIT

...

SDATA

D10 D11 D0

₃₁...

...

SCK

NOTES

1. MULTIPLE SEQUENTIAL REGISTERS MAY BE LOADED CONTINUOUSLY.

2. THE FIRST (LOWEST ADDRESS) REGISTER ADDRESS IS WRITTEN, FOLLOWED BY MULTIPLE 12-BIT DATA-WORDS.

3. THE ADDRESS AUTOMATICALLY INCREMENTS WITH EACH 12-BIT DATA-WORD. (ALL 12 BITS MUST BE WRITTEN.)

4. SL IS HELD LOW UNTIL THE LAST DESIRED REGISTER HAS BEEN LOADED.

5. NEW DATA IS UPDATED AT THE NEXT SL RISING EDGE.

Figure 11. Continuous Serial Write Operation to All Registers

Rev. B | Page 14 of 20

1...11 12 131415 16 17...20

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AD9944KCPRL 替代型号

型号	品牌	替代类型	描述	数据表
AD9944KCPZRL	ADI	完全替代	Complete 10-Bit and 12-Bit, 25 MHz CCD Signal Processors
AD9944KCPZ	ADI	功能相似	Complete 10-Bit and 12-Bit, 25 MHz CCD Signal Processors
AD9944KCP	ADI	完全替代	Complete 10-Bit and 12-Bit, 25 MHz CCD Signal Processors

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AD9945KCPRL	ADI	获取价格	Complete 12-Bit 40 MHz CCD Signal Processor
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AD9945KCPZ	ADI	获取价格	Complete 12-Bit 40 MHz CCD Signal Processor
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