®
14-Bit, 160 MSPS TxDAC+
a
with 2ꢀ Interpolation Filter
AD9772A
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Single 3.0 V to 3.6 V Supply
DIV1
CLKCOM CLKVDD MOD0 MOD1 RESET PLLLOCK DIV0
14-Bit DAC Resolution and Input Data Width
160 MSPS Input Data Rate
67.5 MHz Reconstruction Passband @ 160 MSPS
74 dBc SFDR @ 25 MHz
2ꢀ Interpolation Filter with High- or Low-Pass Response
73 dB Image Rejection with 0.005 dB Passband Ripple
“Zero-Stuffing” Option for Enhanced Direct IF
Performance
Internal 2ꢀ/4ꢀ Clock Multiplier
250 mW Power Dissipation; 13 mW with Power-Down
Mode
AD9772A
CLK+
CLK–
PLLCOM
LPF
CLOCK DISTRIBUTION
AND MODE SELECT
PLL CLOCK
MULTIPLIER
FILTER
MUX
PLLVDD
1ꢀ
1ꢀ
/2
ꢀ
2ꢀ
/4
ꢀ
CONTROL CONTROL
I
ZERO
STUFF
MUX
DATA
INPUTS
(DB13...
DB0)
OUTA
2ꢀ FIR
INTER-
POLATION
FILTER
EDGE-
TRIGGERED
LATCHES
14-BIT DAC
I
OUTB
REFIO
FSADJ
+1.2V REFERENCE
AND CONTROL AMP
SLEEP
48-Lead LQFP Package
DCOM DVDD
ACOM AVDD
REFLO
APPLICATIONS
current source architecture is combined with a proprietary
switching technique to reduce spurious components and enhance
dynamic performance. Matching between the two current outputs
ensures enhanced dynamic performance in a differential output
configuration. The differential current outputs may be fed into a
transformer or a differential op amp topology to obtain a single-
ended output voltage using an appropriate resistive load.
Communication Transmit Channel
W-CDMA Base Stations, Multicarrier Base Stations,
Direct IF Synthesis, Wideband Cable Systems
Instrumentation
PRODUCT DESCRIPTION
The AD9772A is a single-supply, oversampling, 14-bit digital-
to-analog converter (DAC) optimized for baseband or IF
waveform reconstruction applications requiring exceptional
dynamic range. Manufactured on an advanced CMOS process,
it integrates a complete, low distortion 14-bit DAC with a 2ϫ
digital interpolation filter and clock multiplier. The on-chip
PLL clock multiplier provides all the necessary clocks for the
digital filter and the 14-bit DAC. A flexible differential clock
input allows for a single-ended or differential clock driver for
optimum jitter performance.
The on-chip bandgap reference and control amplifier are config-
ured for maximum accuracy and flexibility. The AD9772A can
be driven by the on-chip reference or by a variety of external
reference voltages. The full-scale current of the AD9772A can
be adjusted over a 2 mA to 20 mA range, thus providing addi-
tional gain ranging capabilities.
The AD9772A is available in a 48-lead LQFP package and
specified for operation over the industrial temperature range
of –40°C to +85°C.
For baseband applications, the 2ϫ digital interpolation filter
provides a low-pass response, hence providing up to a threefold
reduction in the complexity of the analog reconstruction filter. It
does so by multiplying the input data rate by a factor of two
while simultaneously suppressing the original upper in-band
image by more than 73 dB. For direct IF applications, the 2ϫ
digital interpolation filter response can be reconfigured to select
the upper in-band image (i.e., high-pass response) while suppress-
ing the original baseband image. To increase the signal level of
the higher IF images and their passband flatness in direct IF
applications, the AD9772A also features a “zero stuffing” option
in which the data following the 2ϫ interpolation filter is upsampled
by a factor of two by inserting midscale data samples.
PRODUCT HIGHLIGHTS
1. A flexible, low power 2
ϫ interpolation filter supporting
reconstruction bandwidths of up to 67.5 MHz can be config-
ured for a low- or high-pass response with 73 dB of image
rejection for traditional baseband or direct IF applications.
2. A “zero-stuffing” option enhances direct IF applications.
3. A low glitch, fast settling 14-bit DAC provides exceptional
dynamic range for both baseband and direct IF waveform
reconstruction applications.
4. The AD9772A digital interface, consisting of edge-
triggered latches and a flexible differential or single-ended
clock input, can support input data rates up to 160 MSPS.
The AD9772A can reconstruct full-scale waveforms with band-
widths as high as 67.5 MHz while operating at an input data rate of
160 MSPS. The 14-bit DAC provides differential current outputs
to support differential or single-ended applications. A segmented
5. On-chip PLL clock multiplier generates all of the inter-
nal high-speed clocks required by the interpolation filter
and DAC.
TxDAC+ is a registered trademark of Analog Devices, Inc.
6. The current output(s) of the AD9772A can easily be config-
ured for various single-ended or differential circuit topologies.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© Analog Devices, Inc., 2002
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