14-Bit, 125 MSPS/105 MSPS, 1.8 V Dual
Analog-to-Digital Converter
AD9648
FUNCTIONAL BLOCK DIAGRAM
FEATURES
AVDD
AGND
SDIO SCLK CSB
1.8 V analog supply operation
1.8 V CMOS or LVDS outputs
SNR = 74.5 dBFS @ 70 MHz
SPI
ORA
D13A
D0A
SFDR = 91 dBc @ 70 MHz
PROGRAMMING DATA
Low power: 78 mW/channel ADC core @ 125 MSPS
Differential analog input with 650 MHz bandwidth
IF sampling frequencies to 200 MHz
On-chip voltage reference and sample-and-hold circuit
2 V p-p differential analog input
VIN+A
VIN–A
ADC
DCOA
VREF
SENSE
DRVDD
AD9648
DNL = 0.35 LSB
Serial port control options
REF
SELECT
VCM
ORB
RBIAS
Offset binary, gray code, or twos complement data format
Optional clock duty cycle stabilizer
Integer 1-to-8 input clock divider
Data output multiplex option
D13B
VIN–B
VIN+B
ADC
D0B
DCOB
Built-in selectable digital test pattern generation
Energy-saving power-down modes
Data clock out with programmable clock and data
alignment
DIVIDE
1 TO 8
DUTY CYCLE
STABILIZER
MODE
CONTROLS
CLK+ CLK–
SYNC
DCS
PDWN DFS OEB
NOTES
1. PIN NAMES ARE FOR THE CMOS PIN CONFIGURATION ONLY;
SEE FIGURE 7 FORLVDS PIN NAMES.
APPLICATIONS
Communications
Figure 1.
Diversity radio systems
Multimode digital receivers
GSM, EDGE, W-CDMA, LT E,
CDMA2000, WiMAX, TD-SCDMA
I/Q demodulation systems
Smart antenna systems
Broadband data applications
Battery-powered instruments
Hand held scope meters
Portable medical imaging
Ultrasound
PRODUCT HIGHLIGHTS
1. The AD96481 operates from a single 1.8 V analog
power supply and features a separate digital output
driver supply to accommodate 1.8 V CMOS or LVDS
logic families.
2. The patented sample-and-hold circuit maintains
excellent performance for input frequencies up to
200 MHz and is designed for low cost, low power, and
ease of use.
3. A standard serial port interface supports various
product features and functions, such as data output
formatting, internal clock divider, power-down,
DCO/data timing and offset adjustments.
Radar/LIDAR
4. The AD9648 is packaged in a 64-lead RoHS compliant
LFCSP that is pin compatible with the AD9650/
AD9269/AD9268 16-bit ADC, the AD9258 14-bit
ADC, the AD9628/AD9231 12-bit ADCs, and the
AD9608/AD9204 10-bit ADCs, enabling a simple
migration path between 10-bit and 16-bit converters
sampling from 20 MSPS to 125 MSPS.
1This product is protected by a U.S patent.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rightsof third parties that may result fromits use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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