Datasheet > AD9520-1

AD9520-1

更新时间： 2024-09-19 06:36:15

品牌	Logo	应用领域
亚德诺 - ADI		时钟发生器
页数	文件大小	规格书
84页	1684K
描述
12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.5 GHz VCO

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AD9520-1 数据手册

AD9520-1

Thevenin-equivalent termination uses a resistor network to

provide 50 Ω termination to a dc voltage that is below V_OLof

the LVPECL driver. In this case, VS_DRV on the AD9520

should equal V_Sof the receiving buffer. Although the resistor

combination shown results in a dc bias point of VS_DRV − 2 V,

the actual common-mode voltage is VS_DRV − 1.3 V because

there is additional current flowing from the AD9520 LVPECL

driver through the pull-down resistor.

When single-ended CMOS clocking is used, some of the

following guidelines apply.

Point-to-point connections should be designed such that each

driver has only one receiver, if possible. Connecting outputs in

this manner allows for simple termination schemes and minimizes

ringing due to possible mismatched impedances on the output

trace. Series termination at the source is generally required to

provide transmission line matching and/or to reduce current

transients at the driver.

The circuit is identical for the case where VS_DRV = 2.5 V, except

that the pull-down resistor is 62.5 Ω and the pull-up is 250 Ω.

VS_DRV

The value of the resistor is dependent on the board design and

timing requirements (typically 10 Ω to 100 Ω is used). CMOS

outputs are also limited in terms of the capacitive load or trace

length that they can drive. Typically, trace lengths less than

3 inches are recommended to preserve signal rise/fall times and

signal integrity.

VS_DRV

127Ω

50Ω

SINGLE-ENDED

(NOT COUPLED)

LVPECL

60.4Ω

(1.0 INCH)

50Ω

10Ω

CMOS

83Ω

MICROSTRIP

Figure 73. Series Termination of CMOS Output

Figure 70. DC-Coupled 3.3V LVPECL Far-End Thevenin Termination

VS_DRV

= VS_DRV

Termination at the far end of the PCB trace is a second option.

The CMOS outputs of the AD9520 do not supply enough current

to provide a full voltage swing with a low impedance resistive, far-

end termination, as shown in Figure 74. The far-end termination

network should match the PCB trace impedance and provide the

desired switching point. The reduced signal swing may still meet

receiver input requirements in some applications. This can be

useful when driving long trace lengths on less critical nets.

= 50Ω

50Ω

LVPECL

Figure 71. DC-Coupled 3.3 V LVPECL Y-Termination

VS_DRV

0.1nF

100Ω DIFFERENTIAL

(COUPLED)

TRANSMISSION LINE

100Ω

LVPECL

0.1nF

100Ω

50Ω

10Ω

CMOS

200Ω

Figure 74. CMOS Output with Far-End Termination

Figure 72. AC-Coupled LVPECL with Parallel Transmission Line

Because of the limitations of single-ended CMOS clocking,

consider using differential outputs when driving high speed

signals over long traces. The AD9520 offers LVPECL outputs

that are better suited for driving long traces where the inherent

noise immunity of differential signaling provides superior

performance for clocking converters.

CMOS CLOCK DISTRIBUTION

The output drivers of the AD9520 can be configured as CMOS

drivers. When selected as a CMOS driver, each output becomes

a pair of CMOS outputs, each of which can be individually

turned on or off and set as inverting or noninverting. These

outputs are 3.3 V or 2.5 V CMOS compatible. However, every

output driver (including the LVPECL drivers) must be run at

either 2.5 V or 3.3 V. The user cannot mix and match 2.5 V and

3.3 V outputs.

Rev. 0 | Page 83 of 84

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与AD9520-1相关器件

型号	品牌	获取价格	描述	数据表
AD9520-1/PCBZ	ADI	获取价格	12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.5 GHz VCO
AD9520-1BCPZ	ADI	获取价格	12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.5 GHz VCO
AD9520-1BCPZ-REEL7	ADI	获取价格	12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.5 GHz VCO
AD9520-2	ADI	获取价格	12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.2 GHz VCO
AD9520-2/PCBZ	ADI	获取价格	12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.2 GHz VCO
AD9520-2BCPZ	ADI	获取价格	12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.2 GHz VCO
AD9520-2BCPZ-REEL7	ADI	获取价格	12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.2 GHz VCO
AD9520-3	ADI	获取价格	12 LVPECL/24 CMOS Output Clock Generator with Integrated 2 GHz VCO
AD9520-3/PCBZ	ADI	获取价格	12 LVPECL/24 CMOS Output Clock Generator with Integrated 2 GHz VCO
AD9520-3BCPZ	ADI	获取价格	12 LVPECL/24 CMOS Output Clock Generator with Integrated 2 GHz VCO

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