6-Output Clock Generator with
Integrated 2.8 GHz VCO
Data Sheet
AD9518-0
FEATURES
FUNCTIONAL BLOCK DIAGRAM
CP
LF
Low phase noise, phase-locked loop (PLL)
On-chip VCO tunes from 2.55 GHz to 2.95 GHz
External VCO/VCXO to 2.4 GHz optional
1 differential or 2 single-ended reference inputs
Reference monitoring capability
Automatic revertive and manual reference
switchover/holdover modes
Accepts LVPECL, LVDS, or CMOS references to 250 MHz
Programmable delays in path to PFD
Digital or analog lock detect, selectable
3 pairs of 1.6 GHz LVPECL outputs
REF1
REF2
STATUS
MONITOR
REFIN
CLK
VCO
DIVIDER
AND MUXs
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
DIV/Φ
DIV/Φ
DIV/Φ
LVPECL
LVPECL
LVPECL
Each output pair shares a 1-to-32 divider with coarse
phase delay
Additive output jitter: 225 fs rms
SERIAL CONTROL PORT
AND
Channel-to-channel skew paired outputs of <10 ps
Automatic synchronization of all outputs on power-up
Manual output synchronization available
Available in a 48-lead LFCSP
AD9518-0
DIGITAL LOGIC
Figure 1.
APPLICATIONS
Low jitter, low phase noise clock distribution
10/40/100 Gb/sec networking line cards, including SONET,
Synchronous Ethernet, OTU2/3/4
Forward error correction (G.710)
Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
High performance wireless transceivers
ATE and high performance instrumentation
GENERAL DESCRIPTION
The AD9518-01 provides a multi-output clock distribution
function with subpicosecond jitter performance, along with an
on-chip PLL and VCO. The on-chip VCO tunes from 2.55 GHz
to 2.95 GHz. Optionally, an external VCO/VCXO of up to
2.4 GHz can be used.
In addition, the AD9516 and AD9517 are similar to the AD9518
but have a different combination of outputs.
Each pair of outputs has dividers that allow both the divide ratio
and coarse delay (or phase) to be set. The range of division for
the LVPECL outputs is 1 to 32.
The AD9518-0 emphasizes low jitter and phase noise to
maximize data converter performance, and it can benefit other
applications with demanding phase noise and jitter requirements.
The AD9518-0 is available in a 48-lead LFCSP and can be
operated from a single 3.3 V supply. An external VCO, which
requires an extended voltage range, can be accommodated
by connecting the charge pump supply (VCP) to 5 V. A separate
LVPECL power supply can be from 2.5 V to 3.3 V (nominal).
The AD9518-0 features six LVPECL outputs (in three pairs).
The LVPECL outputs operate to 1.6 GHz.
The AD9518-0 is specified for operation over the industrial
range of −40°C to +85°C.
For applications that require additional outputs, a crystal
reference input, zero-delay, or EEPROM for automatic
configuration at startup, the AD9520 and AD9522 are available.
1 AD9518 is used throughout the data sheet to refer to all the members of
the AD9518 family. However, when AD9518-0 is used, it refers to that specific
member of the AD9518 family.
Rev. C
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