12-Bit, 20/40/65 MSPS
3 V A/D Converter
a
AD9235
FUNCTIONAL BLOCK DIAGRAM
FEATURES
AVDD
DRVDD
Single 3 V Supply Operation (2.7 V to 3.6 V)
SNR = 70 dBc to Nyquist at 65 MSPS
SFDR = 85 dBc to Nyquist at 65 MSPS
Low Power: 300 mW at 65 MSPS
Differential Input with 500 MHz Bandwidth
On-Chip Reference and SHA
VIN+
VIN–
8-STAGE
SHA
MDAC1
A/D
1 1/2-BIT PIPELINE
3
4
16
REFT
REFB
A/D
DNL = ꢀ0.4 LSB
Flexible Analog Input: 1 V p-p to 2 V p-p Range
Offset Binary or Twos Complement Data Format
Clock Duty Cycle Stabilizer
CORRECTION LOGIC
12
OTR
OUTPUT BUFFERS
D11
D0
APPLICATIONS
Ultrasound Equipment
AD9235
VREF
IF Sampling in Communications Receivers:
IS-95, CDMA-One, IMT-2000
Battery-Powered Instruments
Hand-Held Scopemeters
CLOCK
DUTY CYCLE
STABLIZER
MODE
SELECT
SENSE
REF
SELECT
0.5V
Low Cost Digital Oscilloscopes
CLK
PDWN
DGND
AGND
MODE
PRODUCT DESCRIPTION
PRODUCT HIGHLIGHTS
The AD9235 is a family of monolithic, single 3 V supply, 12-bit,
20/40/65 MSPS analog-to-digital converters. This family
features a high performance sample-and-hold amplifier (SHA)
and voltage reference. The AD9235 uses a multistage differential
pipelined architecture with output error correction logic to provide
12-bit accuracy at 20/40/65 MSPS data rates and guarantee
no missing codes over the full operating temperature range.
1. The AD9235 operates from a single 3 V power supply and
features a separate digital output driver supply to accommodate
2.5 V and 3.3 V logic families.
2. Operating at 65 MSPS, the AD9235 consumes a low 300 mW.
3. The patented SHA input maintains excellent performance
for input frequencies up to 100 MHz and can be configured
for single-ended or differential operation.
The wide bandwidth, truly differential SHA allows a variety of
user-selectable input ranges and offsets including single-ended
applications. It is suitable for multiplexed systems that switch
full-scale voltage levels in successive channels and for sampling
single-channel inputs at frequencies well beyond the Nyquist rate.
Combined with power and cost savings over previously available
analog-to-digital converters, the AD9235 is suitable for applica-
tions in communications, imaging, and medical ultrasound.
4. The AD9235 pinout is similar to the AD9214-65, a 10-bit,
65 MSPS ADC. This allows a simplified upgrade path from
10 bits to 12 bits for 65 MSPS systems.
5. The clock DCS maintains overall ADC performance over a
wide range of clock pulsewidths.
6. The OTR output bit indicates when the signal is beyond the
selected input range.
A single-ended clock input is used to control all internal conversion
cycles. A duty cycle stabilizer (DCS) compensates for wide
variations in the clock duty cycle while maintaining excellent
overall ADC performance. The digital output data is presented
in straight binary or twos complement formats. An out-of-range
(OTR) signal indicates an overflow condition that can be used
with the most significant bit to determine low or high overflow.
Fabricated on an advanced CMOS process, the AD9235 is available
in a 28-lead thin shrink small outline package (TSSOP) and a
32-lead chip scale package (LFCSP) and is specified over the
industrial temperature range (–40°C to +85°C).
REV. B
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