10-Bit, 65/80/105 MSPS
Dual A/D Converter
AD9216
Preliminary Technical Data
specified over the industrial temperature range (–40°C to
+85°C).
FEATURES
Integrated Dual 10-Bit A-to-D Converters
Single 3 V Supply Operation (2.7 V to 3.3 V)
SNR = 58 dBc (to Nyquist, AD9216-105)
SFDR = 75 dBc (to Nyquist, AD9216-105)
Low Power: 280mW at 105MSPS
AGND
AVDD
OTR_A
D9A-D0A
OEB_A
10
VIN+_A
VIN- _A
SHA
ADC
10
Differential Input with 500 MHz 3 dB Bandwidth
Exceptional Cross Talk Immunity > 75dB
Flexible Analog Input: 1 V p-p to 2 V p-p Range
Offset Binary or Twos Complement Data Format
Clock Duty Cycle Stabilizer
REFT_A
REFB_A
MUX_SELECT
CLK_A
CLK_B
Clock
Duty Cycle
Stabilizer
VREF
DCS
SENSE
SHARED_REF
+
-
AGND
0.5V
PWDN_A
PWDN_B
DFS
Mode
Control
REFT_B
REFB_B
APPLICATIONS
OTR_B
D10B-D0B
OEB_B
Ultrasound Equipment
VIN+_B
VIN-_B
SHA
ADC
IF Sampling in Communications Receivers:
3G, Radio Point-to-Point, LMDS, MMDS
Battery-Powered Instruments
Hand-Held Scopemeters
10
10
AD9216
DRVDD
DRGND
Figure 1. Functional Block Diagram
Low Cost Digital Oscilloscopes
PRODUCT HIGHLIGHTS
GENERAL DESCRIPTION
1. Pin compatible with AD9238, dual 12-bit
The AD9216 is a dual, 3 V, 10-bit, 65/80/105 MSPS analog-to-
digital converter. It features dual high performance sample-and
hold amplifiers and an integrated voltage reference. The
AD9216 uses a multistage differential pipelined architecture
with output error correction logic to provide 10-bit accuracy
and guarantee no missing codes over the full operating
temperature range at up to 105 MSPS data rates. The wide
bandwidth, differential SHA allows for a variety of user
selectable input ranges and offsets including single-ended
applications. It is suitable for various applications including
multiplexed systems that switch full-scale voltage levels in
successive channels and for sampling inputs at frequencies well
beyond the Nyquist rate.
20/40/65MSPS ADC and AD9248, dual 14-bit
20/40/65MSPS ADC.
2. Speed grade options off 105 MSPS, 80 MSPS, and
65 MSPS allow flexibility between power, cost, and
performance to suit an application.
3. Low power consumption:
AD9216-105: 105 MSPS = 280 mW
AD9216-80: 80 MSPS = 238 mW
AD9216-65: 65 MSPS = 215mW
4. The patented SHA input maintains excellent
performance for input frequencies up to 100 MHz and
can be configured for single-ended or differential
operation.
Dual single-ended clock inputs are used to control all internal
conversion cycles. A duty cycle stabilizer is available on the
AD9216 (all speed grades) and can compensate for wide
variations in the clock duty cycle, allowing the converters to
maintain excellent performance. The digital output data is
presented in either straight binary or twos complement format.
Out-of-range signals indicate an overflow condition, which can
be used with the most significant bit to determine low or high
overflow.
5. Typical channel isolation of 75 dB @ fIN = 10 MHz.
6. The clock duty cycle stabilizer maintains performance
over a wide range of clock duty cycles.
Fabricated on an advanced CMOS process, the AD9216 is
available in a space saving 64-lead LFCSP (9x9) and is
Rev. PrD_6/15/2004
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its use,
nor for any infringements of patents or other rights of third parties that may
result from its use. Specifications subject to change without notice. No license
is granted by implication or otherwise under any patent or patent rights of
Analog Devices. Trademarks and registered trademarks are the property of
their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106,
U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703© 2004 Analog Devices, Inc. All rights reserved.
5秒后页面跳转
三星深化印度制造布局，供应链本地化进程加速
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
纳微科技震撼发布GaNSlim革新氮化镓功率芯片
意法半导体发布第四代SiC技术，助力电动汽车电驱
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
