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AD9218_06 PDF预览

AD9218_06

更新时间: 2024-10-28 12:27:19
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
28页 952K
描述
10-Bit, 40/65/80/105 MSPS 3 V Dual Analog-to-Digital Converter

AD9218_06 数据手册

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10-Bit, 40/65/80/105 MSPS  
3 V Dual Analog-to-Digital Converter  
AD9218  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
Dual 10-bit, 40 MSPS, 65 MSPS, 80 MSPS, and 105 MSPS ADC  
Low power: 275 mW at 105 MSPS per channel  
On-chip reference and track-and-hold  
300 MHz analog bandwidth each channel  
SNR = 57 dB @ 41 MHz, Encode = 80 MSPS  
1 V p-p or 2 V p-p analog input range each channel  
3.0 V single-supply operation (2.7 V to 3.6 V)  
Power-down mode for single-channel operation  
Twos complement or offset binary output mode  
Output data alignment mode  
AD9218  
ENCODE A  
TIMING  
A
A
A
A
IN  
OUTPUT  
D9 TO D0  
A
T/H  
ADC  
REF  
ADC  
/
/
A
REGISTER  
10  
10  
IN  
USER  
SELECT NO. 1  
REF  
REF  
A
IN  
USER  
SELECT NO. 2  
OUT  
REF  
B
IN  
DATA  
FORMAT/  
GAIN  
A
A
B
B
IN  
OUTPUT  
D9 TO D0  
B
/
/
10  
T/H  
B
REGISTER  
10  
IN  
Pin compatible with the 8-bit AD9288  
TIMING  
ENCODE B  
–75 dBc crosstalk between channels  
V
V
DD  
D
GND  
APPLICATIONS  
Figure 1.  
Battery-powered instruments  
Hand-held scopemeters  
Low cost digital oscilloscopes  
I and Q communications  
Ultrasound equipment  
GENERAL DESCRIPTION  
PRODUCT HIGHLIGHTS  
The AD9218 is a dual 10-bit monolithic sampling analog-to-  
digital converter with on-chip track-and-hold circuits. The  
product is low cost, low power, and is small and easy to use. The  
AD9218 operates at a 105 MSPS conversion rate with  
outstanding dynamic performance over its full operating range.  
Each channel can be operated independently.  
1. Low Power. Only 275 mW power dissipation per channel  
at 105 MSPS. Other speed grades proportionally scaled  
down while maintaining high ac performance.  
2. Pin Compatibility Upgrade. Allows easy migration from 8-bit  
to 10-bit devices. Pin compatible with the 8-bit AD9288  
dual ADC.  
The ADC requires only a single 3.0 V (2.7 V to 3.6 V) power  
supply and a clock for full operation. No external reference or  
driver components are required for many applications. The  
digital outputs are TTL/CMOS compatible and a separate  
output power supply pin supports interfacing with 3.3 V or  
2.5 V logic.  
3. Easy to Use. On-chip reference and user controls provide  
flexibility in system design.  
4. High Performance. Maintains 54 dB SNR at 105 MSPS  
with a Nyquist input.  
5. Channel Crosstalk. Very low at –75 dBc.  
The clock input is TTL/CMOS compatible and the 10-bit digital  
outputs can be operated from 3.0 V (2.5 V to 3.6 V) supplies.  
User-selectable options offer a combination of power-down  
modes, digital data formats, and digital data timing schemes.  
In power-down mode, the digital outputs are driven to a high  
impedance state.  
6. Fabricated on an Advanced CMOS Process. Available in a  
48-lead low profile quad flat package (7 mm × 7 mm  
LQFP) specified over the industrial temperature range  
(−40°C to +85°C).  
Rev. C  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2006 Analog Devices, Inc. All rights reserved.  
 
 

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