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AD9216BCPZRL7-120 PDF预览

AD9216BCPZRL7-120

更新时间: 2024-10-28 14:47:35
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
40页 1494K
描述
IC 2-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QCC64, 9 X 9 MM, MO-220-VMMD, LFCSP-64, Analog to Digital Converter

AD9216BCPZRL7-120 数据手册

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10-Bit, 65/80/105 MSPS  
Dual A/D Converter  
AD9216  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Integrated dual 10-bit ADC  
AVDD AGND  
Single 3 V supply operation  
VIN+_A  
VIN–_A  
10  
10  
SNR = 57.6 dBc (to Nyquist, AD9216-105)  
SFDR = 74 dBc (to Nyquist, AD9216-105)  
Low power: 150 mW/ch at 105 MSPS  
Differential input with 300 MHz 3 dB bandwidth  
Exceptional crosstalk immunity < -80 dB  
Offset binary or twos complement data format  
Clock duty cycle stabilizer  
D9_A–D0_A  
OEB_A  
SHA  
ADC  
OUTPUT  
MUX/  
BUFFERS  
REFT_A  
REFB_A  
VREF  
MUX_SELECT  
CLK_A  
CLOCK  
DUTY CYCLE  
STABILIZER  
CLK_B  
DCS  
SENSE  
AGND  
SHARED_REF  
PWDN_A  
PWDN_B  
DFS  
0.5V  
APPLICATIONS  
MODE  
CONTROL  
Ultrasound equipment  
REFT_B  
REFB_B  
VIN+_B  
VIN–_B  
IF sampling in communications receivers  
3G, radio point-to-point, LMDS, MMDS  
Battery-powered instruments  
Hand-held scopemeters  
10  
10  
OUTPUT  
MUX/  
BUFFERS  
D9_B–D0_B  
OEB_B  
SHA  
ADC  
Low cost digital oscilloscopes  
AD9216  
DRVDD  
DRGND  
GENERAL DESCRIPTION  
Figure 1.  
The AD9216 is a dual, 3 V, 10-bit, 105 MSPS analog-to-digital  
converter (ADC). It features dual high performance sample-  
and-hold amplifiers (SHAs) and an integrated voltage reference.  
The AD9216 uses a multistage differential pipelined archi-  
tecture with output error correction logic to provide 10-bit  
accuracy and guarantee no missing codes over the full  
operating temperature range at up to 105 MSPS data rates.  
The wide bandwidth, differential SHA allows for a variety of  
user selectable input ranges and offsets, including single-ended  
applications. The AD9216 is suitable for various applications,  
including multiplexed systems that switch full-scale voltage  
levels in successive channels and for sampling inputs at  
frequencies well beyond the Nyquist rate.  
Fabricated on an advanced CMOS process, the AD9216 is avail-  
able in a space saving, Pb-free, 64-lead LFCSP (9 mm × 9 mm) and  
is specified over the industrial temperature range (−40°C to  
+85°C).  
PRODUCT HIGHLIGHTS  
1. Pin compatible with AD9238, dual 12-bit 20 MSPS/40 MSPS/  
65 MSPS ADC and AD9248, dual 14-bit 20 MSPS/40 MSPS/  
65 MSPS ADC.  
2. 105 MSPS capability allows for demanding, high frequency  
applications.  
3. Low power consumption: AD9216–105: 105 MSPS = 300 mW.  
Dual single-ended clock inputs are used to control all internal  
conversion cycles. A duty cycle stabilizer is available on the  
AD9216 and can compensate for wide variations in the clock  
duty cycle, allowing the converters to maintain excellent  
performance. The digital output data is presented in either  
straight binary or twos complement format.  
4. The patented SHA input maintains excellent performance for  
input frequencies up to 200 MHz and can be configured for  
single-ended or differential operation.  
5. Typical channel crosstalk of < −80 dB at fIN up to 70 MHz.  
6. The clock duty cycle stabilizer maintains performance over a  
wide range of clock duty cycles.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
© 2005 Analog Devices, Inc. All rights reserved.  

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