Complete 10-Bit, 20 MSPS, 80 mW
CMOS A/D Converter
a
AD9200
FEATURES
A single clock input is used to control all internal conversion
cycles. The digital output data is presented in straight binary
output format. An out-of-range signal (OTR) indicates an over-
flow condition which can be used with the most significant bit
to determine low or high overflow.
CMOS 10-Bit, 20 MSPS Sampling A/D Converter
Pin-Compatible with AD876
Power Dissipation: 80 mW (3 V Supply)
Operation Between 2.7 V and 5.5 V Supply
Differential Nonlinearity: 0.5 LSB
Power-Down (Sleep) Mode
Three-State Outputs
Out-of-Range Indicator
Built-In Clamp Function (DC Restore)
Adjustable On-Chip Voltage Reference
IF Undersampling to 135 MHz
The AD9200 can operate with supply range from 2.7 V to
5.5 V, ideally suiting it for low power operation in high speed
portable applications.
The AD9200 is specified over the industrial (–40°C to +85°C)
and commercial (0°C to +70°C) temperature ranges.
PRODUCT HIGHLIGHTS
Low Power
PRODUCT DESCRIPTION
The AD9200 is a monolithic, single supply, 10-bit, 20 MSPS
analog-to-digital converter with an on-chip sample-and-hold
amplifier and voltage reference. The AD9200 uses a multistage
differential pipeline architecture at 20 MSPS data rates and
guarantees no missing codes over the full operating temperature
range.
The AD9200 consumes 80 mW on a 3 V supply (excluding the
reference power). In sleep mode, power is reduced to below
5 mW.
Very Small Package
The AD9200 is available in both a 28-lead SSOP and 48-lead
LQFP packages.
The input of the AD9200 has been designed to ease the devel-
opment of both imaging and communications systems. The user
can select a variety of input ranges and offsets and can drive the
input either single-ended or differentially.
Pin Compatible with AD876
The AD9200 is pin compatible with the AD876, allowing older
designs to migrate to lower supply voltages.
300 MHz On-Board Sample-and-Hold
The versatile SHA input can be configured for either single-
ended or differential inputs.
The sample-and-hold (SHA) amplifier is equally suited for both
multiplexed systems that switch full-scale voltage levels in suc-
cessive channels and sampling single-channel inputs at frequen-
cies up to and beyond the Nyquist rate. AC coupled input
signals can be shifted to a predetermined level, with an onboard
clamp circuit (AD9200ARS, AD9200KST). The dynamic per-
formance is excellent.
Out-of-Range Indicator
The OTR output bit indicates when the input signal is beyond
the AD9200’s input range.
Built-In Clamp Function
Allows dc restoration of video signals with AD9200ARS and
AD9200KST.
The AD9200 has an onboard programmable reference. An
external reference can also be chosen to suit the dc accuracy and
temperature drift requirements of the application.
FUNCTIONAL BLOCK DIAGRAM
CLAMP
IN
CLK
AVDD
DRVDD
CLAMP
STBY
SHA
GAIN
SHA
GAIN
SHA
GAIN
SHA
GAIN
SHA
MODE
AIN
REFTS
REFBS
A/D
THREE-
STATE
D/A
D/A
D/A
A/D
A/D
D/A
A/D
A/D
REFTF
REFBF
CORRECTION LOGIC
OUTPUT BUFFERS
OTR
VREF
D9
(MSB)
AD9200
1V
REFSENSE
D0
(LSB)
DRVSS
AVSS
REV. E
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© Analog Devices, Inc., 1999