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AD7302BR PDF预览

AD7302BR

更新时间: 2024-02-25 04:48:40
品牌 Logo 应用领域
亚德诺 - ADI 转换器数模转换器光电二极管
页数 文件大小 规格书
16页 294K
描述
2.7 V to 5.5 V, Parallel Input Dual Voltage Output 8-Bit DAC

AD7302BR 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP20,.4针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1
最大模拟输出电压:3 V最小模拟输出电压:
转换器类型:D/A CONVERTER输入位码:BINARY
输入格式:PARALLEL, 8 BITSJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:12.8 mm
最大线性误差 (EL):0.3906%湿度敏感等级:1
位数:8功能数量:1
端子数量:20最高工作温度:105 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:3/5 V
认证状态:Not Qualified座面最大高度:2.65 mm
最大稳定时间:2 µs标称安定时间 (tstl):1.2 µs
子类别:Other Converters最大压摆率:5 mA
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.5 mm
Base Number Matches:1

AD7302BR 数据手册

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AD7302  
PIN FUNCTION DESCRIPTIONS  
Pin  
No.  
Mnemonic Function  
1-8  
D7–D0  
Parallel Data Inputs. Eight-bit data is loaded to the input register of the AD7302 under the control of CS  
and WR.  
9
CS  
Chip Select. Active low logic input.  
10  
WR  
Write Input. WR is an active low logic input used in conjunction with CS and A/B to write data to the selected  
DAC register.  
11  
12  
13  
A/B  
PD  
DAC Select. Address pin used to select writing to either DAC A or DAC B.  
Active low input used to put the part into low power mode reducing current consumption to less than 1 µA.  
Load DAC Logic Input. When this logic input is taken low both DAC outputs are simultaneously updated with  
the contents of their DAC registers. If LDAC is permanently tied low, the DACs are updated on the rising  
edge of WR.  
LDAC  
14  
CLR  
Asynchronous Clear Input (Active Low). When this input is taken low the DAC registers are loaded with all  
zeroes and the DAC outputs are cleared to zero volts.  
15  
16  
VDD  
REFIN  
Power Supply Input. These parts can be operated from 2.7 V to 5.5 V and should be decoupled to AGND.  
External Reference Input. This can used as the reference for both DACs. The range on this reference input is  
1 V to VDD/2. If REFIN is directly tied to VDD the internal VDD/2 reference is selected.  
17  
18  
19  
20  
AGND  
Analog Ground reference point and return point for all analog current on the part.  
Analog output voltage from DAC B. The output amplifier can swing rail to rail on its output.  
Analog output voltage from DAC A. The output amplifier can swing rail to rail on its output.  
Digital Ground reference point and return point for all digital current on the part.  
V
V
OUTB  
OUTA  
DGND  
PIN CONFIGURATION  
1
2
3
4
5
6
7
8
9
20 DGND  
(MSB) DB7  
DB6  
19  
18  
V
A
B
OUT  
V
DB5  
OUT  
17 AGND  
DB4  
REFIN  
16  
15  
14  
13  
12  
DB3  
AD7302  
TOP VIEW  
(Not to Scale)  
V
DB2  
DD  
DB1  
CLR  
LDAC  
PD  
(LSB) DB0  
CS  
WR 10  
11 A/B  
REV. 0  
–5–  

AD7302BR 替代型号

型号 品牌 替代类型 描述 数据表
AD7302BR-REEL7 ADI

完全替代

IC PARALLEL, 8 BITS INPUT LOADING, 1.2 us SETTLING TIME, 8-BIT DAC, PDSO20, SOIC-20, Digit
AD7302BRZ-REEL7 ADI

完全替代

2.7 V to 5.5 V, Parallel Input Dual Voltage Output 8-Bit DAC
AD7302BRZ ADI

完全替代

2.7 V to 5.5 V, Parallel Input Dual Voltage Output 8-Bit DAC

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暂无描述
AD7302BRUZ ROCHESTER

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AD7302BRUZ-REEL ADI

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AD7302BRUZ-REEL7 ROCHESTER

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