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AD7156

更新时间: 2024-01-18 23:18:30
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
28页 388K
描述
Ultralow Power, 1.8 V, 3 mm × 3 mm, 2-Channel Capacitance Converter

AD7156 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:HVSON, SOLCC10,.12,20针数:10
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.55
模拟集成电路 - 其他类型:ANALOG CIRCUITJESD-30 代码:S-PDSO-N10
JESD-609代码:e3长度:3 mm
湿度敏感等级:3功能数量:1
端子数量:10最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HVSON封装等效代码:SOLCC10,.12,20
封装形状:SQUARE封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260电源:2/3.3 V
认证状态:Not Qualified座面最大高度:0.85 mm
子类别:Other Analog ICs最大供电电流 (Isup):0.085 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.8 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3 mm
Base Number Matches:1

AD7156 数据手册

 浏览型号AD7156的Datasheet PDF文件第21页浏览型号AD7156的Datasheet PDF文件第22页浏览型号AD7156的Datasheet PDF文件第23页浏览型号AD7156的Datasheet PDF文件第25页浏览型号AD7156的Datasheet PDF文件第26页浏览型号AD7156的Datasheet PDF文件第27页 
AD7156  
HARDWARE DESIGN CONSIDERATIONS  
OVERVIEW  
PARASITIC RESISTANCE TO GROUND  
The AD7156 is an interface to capacitive sensors.  
On the input side, Sensor CX can be connected directly between  
the AD7156 EXC and CIN pins. The way it is connected and the  
electrical parameters of the sensor connection, such as parasitic  
resistance or capacitance, can affect the system performance.  
Therefore, any circuit with additional components in the capacitive  
front end, such as overvoltage protection, has to be carefully  
designed, considering the AD7156 specified limits and informa-  
tion provided in this section.  
R
GND1  
DATA  
CIN  
CDC  
C
X
R
GND2  
EXC  
On the output side, the AD7156 can work as a standalone device,  
using the power-up default register settings and flagging the  
result on the digital outputs. Alternatively, the AD7156 can be  
interfaced to a microcontroller via the 2-wire serial interface,  
offering flexibility by overwriting the AD7156 register values  
from the host with a user-specific setup.  
Figure 43. Parasitic Resistance to Ground  
The AD7156 CDC result is affected by a leakage current from  
CX to ground; therefore, CX should be isolated from the ground.  
The equivalent resistance between CX and ground should be  
maximized (see Figure 43). For more information, see Figure 10  
to Figure 13.  
PARASITIC CAPACITANCE TO GROUND  
PARASITIC PARALLEL RESISTANCE  
C
GND1  
DATA  
CIN  
CDC  
DATA  
CIN  
CDC  
C
X
C
R
P
X
C
GND2  
EXC  
EXC  
Figure 42. Parasitic Capacitance to Ground  
Figure 44. Parasitic Parallel Resistance  
The CDC architecture used in the AD7156 measures the  
capacitance, CX, connected between the EXC pins and the  
CIN pins. In theory, any capacitance, CGND, to ground should  
not affect the CDC result (see Figure 42).  
The AD7156 CDC measures the charge transfer between the  
EXC and CIN pins. Any resistance connected in parallel to the  
measured capacitance, CX (see Figure 44), such as the parasitic  
resistance of the sensor, also transfers charge. Therefore, the  
parallel resistor is seen as an additional capacitance in the  
output data. The equivalent parallel capacitance (or error  
caused by the parallel resistance) can be approximately  
calculated as  
The practical implementation of the circuitry in the chip implies  
certain limits, and the result is gradually affected by capacitance  
to ground (for information about the allowed capacitance to  
GND for CIN and information about excitation see Table 1  
and Figure 4 to Figure 9).  
1
CP  
=
RP × fEXC × 4  
where:  
RP is the parallel resistance.  
EXC is the excitation frequency.  
For additional information, see Figure 15.  
f
Rev. 0 | Page 24 of 28  
 
 
 
 
 
 

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