Datasheet > AD6657AEBZ

AD6657AEBZ

更新时间： 2024-02-29 00:52:36

品牌	Logo	应用领域
亚德诺 - ADI		接收机
页数	文件大小	规格书
36页	1694K
描述
Quad IF Receiver

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AD6657AEBZ 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	BGA
包装说明：	10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MO-205AC, CSPBGA-144	针数：	144
Reach Compliance Code：	compliant	ECCN代码：	5A991.B
HTS代码：	8542.39.00.01	风险等级：	5.26
JESD-30 代码：	S-PBGA-B144	JESD-609代码：	e3
长度：	10 mm	湿度敏感等级：	1
功能数量：	1	端子数量：	144
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	LFBGA
封装等效代码：	BGA144,12X12,32	封装形状：	SQUARE
封装形式：	GRID ARRAY, LOW PROFILE, FINE PITCH	峰值回流温度（摄氏度）：	225
电源：	1.8 V	认证状态：	Not Qualified
座面最大高度：	1.4 mm	子类别：	Other Telecom ICs
标称供电电压：	1.8 V	表面贴装：	YES
电信集成电路类型：	RF AND BASEBAND CIRCUIT	温度等级：	INDUSTRIAL
端子面层：	MATTE TIN	端子形式：	BALL
端子节距：	0.8 mm	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	10 mm

AD6657AEBZ 数据手册

Quad IF Receiver

AD6657A

Data Sheet

FEATURES

FUNCTIONAL BLOCK DIAGRAM

AVDD

AGND

DRVDD DRGND

11-bit, 200 MSPS output data rate per channel

Integrated noise shaping requantizer

Performance with NSR enabled

SNR: 76.0 dBFS in 40 MHz band to 70 MHz at 185 MSPS

SNR: 73.6 dBFS in 60 MHz band to 70 MHz at 185 MSPS

SNR: 72.8 dBFS in 65 MHz band to 70 MHz at 185 MSPS

Performance with NSR disabled

SNR: 66.5 dBFS to 70 MHz at 185 MSPS

SFDR: 88 dBc to 70 MHz at 185 MSPS

Low power: 1.2 W at 185 MSPS

1.8 V analog supply operation

1.8 V LVDS (ANSI-644 levels) output

1-to-8 integer clock divider

Internal ADC voltage reference

1.75 V p-p analog input range (programmable to 2.0 V p-p)

Differential analog inputs with 800 MHz bandwidth

95 dB channel isolation/crosstalk

AD6657A

DCO±AB

DO±AB

VIN+A

VIN–A

VCMA

VIN+B

VIN–B

VCMB

VIN+C

VIN–C

VCMC

VIN+D

VIN–D

VCMD

PIPELINE

ADC

NOISE SHAPING

REQUANTIZER

PORT A

NOISE SHAPING

REQUANTIZER

PIPELINE

ADC

D10±AB

DCO±CD

DO±CD

NOISE SHAPING

REQUANTIZER

PIPELINE

ADC

PORT B

NOISE SHAPING

REQUANTIZER

PIPELINE

ADC

D10±CD

MODE

SYNC

PDWN

REFERENCE

CLOCK

DIVIDER

SERIAL PORT

Serial port control

User-configurable built-in self test (BIST) capability

Energy saving power-down modes

SCLK SDIO

CSB

CLK+ CLK–

Figure 1.

APPLICATIONS

Communications

Diversity radio and smart antenna (MIMO) systems

Multimode digital receivers (3G)

WCDMA, LTE, CDMA2000

WiMAX, TD-SCDMA

I/Q demodulation systems

General-purpose software radios

Each ADC output is connected internally to an NSR block. The

integrated NSR circuitry allows for improved SNR performance

in a smaller frequency band within the Nyquist bandwidth. The

device supports two different output modes selectable via the

external MODE pin or the serial port interface (SPI).

GENERAL DESCRIPTION

The AD6657A is an 11-bit, 200 MSPS, quad channel intermediate

frequency (IF) receiver specifically designed to support multiple

antenna systems in telecommunication applications where high

dynamic range performance, low power, and small size are desired.

With the NSR feature enabled, the outputs of the ADCs are

processed such that the AD6657A supports enhanced SNR per-

formance within a limited portion of the Nyquist bandwidth

while maintaining an 11-bit output resolution. The NSR block

can be programmed to provide a bandwidth of either 22%, 33%,

or 36% of the sample clock. For example, with a sample clock

rate of 185 MSPS, the AD6657A can achieve up to 76.0 dBFS

SNR for a 40 MHz bandwidth in the 22% mode, up to 73.6 dBFS

SNR for a 60 MHz bandwidth in the 33% mode, or up to 72.8 dBFS

SNR for a 65 MHz bandwidth in the 36% mode.

The device consists of four high performance ADCs and NSR

digital blocks. Each ADC consists of a multistage, differential

pipelined architecture with integrated output error correction

logic. The ADC features a wide bandwidth switched capacitor

sampling network within the first stage of the differential pipeline.

An integrated voltage reference eases design considerations. A

duty cycle stabilizer (DCS) compensates for variations in the

ADC clock duty cycle, allowing the converters to maintain

excellent performance.

(General Description continued on Page 3)

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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