Dual IF Receiver
AD6659
FEATURES
FUNCTIONAL BLOCK DIAGRAM
AVDD AGND
SDIO
SCLK
CSB
12-bit, 80 MSPS output data rate per channel
1.8 V analog supply operation (AVDD)
1.8 V to 3.3 V output supply (DRVDD)
SPI
PROGRAMMING DATA
ORA
Integrated noise shaping requantizer (NSR)
Integrated quadrature error correction (QEC)
Performance with NSR enabled
SNR = 81 dBFS in 16 MHz band up to 30 MHz at 80 MSPS
Performance with NSR disabled
D11A (MSB)
QUADRATURE
16
12
NOISE
SHAPING
REQUANTIZER
VIN+A
VIN–A
ERROR AND
DC OFFSET
CORRECTION
ADC
D0A (LSB)
DCOA
VREF
SNR = 72 dBFS up to 70 MHz at 80 MSPS
SFDR = 90 dBc up to 70 MHz input at 80 MSPS
Low power: 98 mW per channel at 80 MSPS
Differential input with 700 MHz bandwidth
On-chip voltage reference and sample-and-hold circuit
2 V p-p differential analog input
SENSE
DRVDD
AD6659
VCM
REF
SELECT
RBIAS
ORB
QUADRATURE
ERROR AND
DC OFFSET
D11B (MSB)
16
12
NOISE
SHAPING
REQUANTIZER
VIN+B
VIN–B
ADC
CORRECTION
D0B (LSB)
DCOB
Serial port control options
Offset binary, gray code, or twos complement data format
Optional clock duty cycle stabilizer
Integer 1-to-6 input clock divider
DIVIDE DUTY CYCLE
MODE
CONTROLS
1 TO 6
STABILIZER
Data output multiplex option
CLK+ CLK–
SYNC
DCS
PDWN DFS OEB
Built-in selectable digital test pattern generation
Energy-saving power-down modes
Figure 1.
Data clock out with programmable clock and data alignment
PRODUCT HIGHLIGHTS
1. The AD6659 operates from a single 1.8 V analog power
supply and features a separate digital output driver supply
to accommodate 1.8 V to 3.3 V logic families.
2. SPI-selectable noise shaping requantizer (NSR) function
that allows for improved SNR within a reduced bandwidth
of up to 70 MHz at 80 MSPS.
3. SPI-selectable dc correction and quadrature error
correction (QEC) that corrects for dc offset, gain, and
phase mismatches between the two channels.
APPLICATIONS
Communications
Diversity radio systems
Multimode digital receivers
3G, W-CDMA, LTE, CDMA2000, TD-SCDMA, MC-GSM
I/Q demodulation systems
Smart antenna systems
Battery-powered instruments
General-purpose software radios
4. A standard serial port interface supports various product
features and functions, such as data output formatting,
internal clock divider, power-down, DCO/data timing,
offset adjustments, and voltage reference modes.
5. The AD6659 is packaged in a 64-lead RoHS-compliant
LFCSP that is pin compatible with the AD9269 16-bit
ADC, the AD9268 16-bit ADC, the AD9258 14-bit ADC,
the AD9251 14-bit ADC, the AD9231 12-bit ADC, and the
AD9204 10-bit ADC, enabling a simple migration path
between 10-bit and 16-bit converters sampling from
20 MSPS to 125 MSPS.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2010 Analog Devices, Inc. All rights reserved.
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