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AD5337_15

更新时间: 2024-11-10 01:12:35
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
28页 593K
描述
2.5 V to 5.5 V, 250A, 2-Wire Interface, Dual Voltage Output, 8-/10-/12-Bit DACs

AD5337_15 数据手册

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2.5 V to 5.5 V, 250 μA, 2-Wire Interface,  
Dual Voltage Output, 8-/10-/12-Bit DACs  
AD5337/AD5338/AD5339  
GENERAL DESCRIPTION  
FEATURES  
AD5337  
The AD5337/AD5338/AD5339 are dual 8-, 10-, and 12-bit  
buffered voltage output DACs, respectively. Each part is housed  
in an 8-lead MSOP package and operates from a single 2.5 V to  
5.5 V supply, consuming 250 μA at 3 V. On-chip output amplifiers  
allow rail-to-rail output swing with a slew rate of 0.7 V/μs. A 2-  
wire serial interface operates at clock rates up to 400 kHz. This  
interface is SMBus compatible at VDD < 3.6 V. Multiple devices  
can be placed on the same bus.  
2 buffered 8-bit DACs in 8-lead MSOP  
AD5338, AD5338-1  
2 buffered 10-bit DACs in 8-lead MSOP  
AD5339  
2 buffered 12-bit DACs in 8-lead MSOP  
Low power operation: 250 μA @ 3 V, 300 μA @ 5 V  
2-wire (I2C-compatible) serial interface  
2.5 V to 5.5 V power supply  
Guaranteed monotonic by design over all codes  
Power-down to 80 nA @ 3 V, 200 nA @ 5 V  
3 power-down modes  
Double-buffered input logic  
Output range: 0 V to VREF  
Power-on reset to 0 V  
Simultaneous update of outputs (LDAC function)  
Software clear facility  
The references for the two DACs are derived from one reference  
pin. The outputs of all DACs can be updated simultaneously  
LDAC  
using the software  
function. The parts incorporate a  
power-on reset circuit to ensure that the DAC outputs power up  
to 0 V and remain there until a valid write to the device takes  
place. A software clear function resets all input and DAC  
registers to 0 V. A power-down feature reduces the current  
consumption of the devices to 200 nA @ 5 V (80 nA @ 3 V).  
The low power consumption of these parts in normal operation  
makes them ideally suited to portable battery-operated equip-  
ment. The power consumption is typically 1.5 mW at 5 V and  
0.75 mW at 3 V, reducing to 1 μW in power-down mode.  
Data readback facility  
On-chip rail-to-rail output buffer amplifiers  
Temperature range: −40°C to +105°C  
APPLICATIONS  
Portable battery-powered instruments  
Digital gain and offset adjustment  
Programmable voltage and current sources  
Programmable attenuators  
Industrial process control  
FUNCTIONAL BLOCK DIAGRAM  
V
DD  
REFIN  
LDAC  
INPUT  
DAC  
STRING  
DAC A  
SCL  
SDA  
V
V
A
B
BUFFER  
BUFFER  
OUT  
OUT  
REGISTER  
REGISTER  
INTERFACE  
LOGIC  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC B  
A0  
POWER-DOWN  
LOGIC  
POWER-ON  
RESET  
AD5337/AD5338/AD5339  
GND  
Figure 1.  
Rev. C  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 www.analog.com  
Fax: 781.461.3113 ©2003–2007 Analog Devices, Inc. All rights reserved.  
 

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