2.5 V to 5.5 V, 250 µA, 2-Wire Interface
Dual-Voltage Output, 8-/10-/12-Bit DACs
AD5337/AD5338/AD5339
GENERAL DESCRIPTION
FEATURES
AD5337/AD5338/AD5339 are dual 8-, 10-, and 12-bit buffered
voltage output DACs in an 8-lead MSOP package, which
operate from a single 2.5 V to 5.5 V supply, consuming 250 µA
at 3 V. On-chip output amplifiers allow rail-to-rail output swing
with a slew rate of 0.7 V/µs. A 2-wire serial interface operates at
clock rates up to 400 kHz. This interface is SMBus-compatible
at VDD < 3.6 V. Multiple devices can be placed on the same bus.
AD5337
2 buffered 8-bit DACs in 8-lead MSOP
AD5338, AD5338-1
2 buffered 10-bit DACs in 8-lead MSOP
AD5339
2 buffered 12-bit DACs in 8-lead MSOP
Low power operation: 250 mA @ 3 V, 300 mA @ 5 V
2-wire (I2C®compatible) serial interface
2.5 V to 5.5 V power supply
Guaranteed monotonic by design over all codes
Power-down to 80 nA @ 3 V, 200 nA @ 5 V
3 power-down modes
Double-buffered input logic
Output range: 0 V to VREF
Power-on reset to 0 V
Simultaneous update of outputs (LDAC function)
Software clear facility
The references for the two DACs are derived from one reference
pin. The outputs of all DACs may be updated simultaneously
using the software
function. The parts incorporate a
LDAC
power-on reset circuit that ensures that the DAC outputs power
up to 0 V and remain there until a valid write to the device
takes place. A software clear function resets all input and DAC
registers to 0 V. A power-down feature reduces the current
consumption of the devices to 200 nA @ 5 V (80 nA @ 3 V).
The low power consumption of these parts in normal operation
makes them ideally suited to portable battery-operated
Data readback facility
equipment. The power consumption is typically 1.5 mW at 5 V
and 0.75 mW at 3 V, reducing to 1 µW in power-down mode.
On-chip rail-to-rail output buffer amplifiers
Temperature range −40°C to +105°C
APPLICATIONS
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
Industrial process control
FUNCTIONAL BLOCK DIAGRAM
V
REFIN
DD
LDAC
INPUT
REGISTER
DAC
REGISTER
STRING
DAC A
SCL
SDA
V
A
BUFFER
BUFFER
OUT
INTERFACE
LOGIC
INPUT
REGISTER
DAC
REGISTER
STRING
DAC B
V
B
OUT
A0
POWER-DOWN
LOGIC
POWER-ON
RESET
AD5337/AD5338/AD5339
GND
Figure 1.
Rev. A
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