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A80960KB16 PDF预览

A80960KB16

更新时间: 2024-09-17 15:46:43
品牌 Logo 应用领域
英特尔 - INTEL 时钟外围集成电路装置
页数 文件大小 规格书
44页 2412K
描述
RISC Microprocessor, 32-Bit, 16MHz, CMOS, CPGA132, 2.54 MM PITCH, CERAMIC, PGA-132

A80960KB16 技术参数

生命周期:Obsolete零件包装代码:PGA
包装说明:PGA, PGA132,14X14针数:132
Reach Compliance Code:compliantECCN代码:3A991.A.2
HTS代码:8542.31.00.01风险等级:5.76
Is Samacsys:N其他特性:OPERATING CASE TEMPERATURE 0 TO 85 C
地址总线宽度:32位大小:32
边界扫描:NO最大时钟频率:32 MHz
外部数据总线宽度:32格式:FLOATING POINT
集成缓存:NOJESD-30 代码:S-CPGA-P132
长度:37.08 mm低功率模式:NO
DMA 通道数量:外部中断装置数量:4
串行 I/O 数:端子数量:132
片上数据RAM宽度:最高工作温度:85 °C
最低工作温度:封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:PGA封装等效代码:PGA132,14X14
封装形状:SQUARE封装形式:GRID ARRAY
电源:5 V认证状态:Not Qualified
RAM(字数):0座面最大高度:4.57 mm
速度:16 MHz子类别:Microprocessors
最大压摆率:315 mA最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:NO技术:CMOS
温度等级:OTHER端子形式:PIN/PEG
端子节距:2.54 mm端子位置:PERPENDICULAR
宽度:37.08 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR, RISC
Base Number Matches:1

A80960KB16 数据手册

 浏览型号A80960KB16的Datasheet PDF文件第2页浏览型号A80960KB16的Datasheet PDF文件第3页浏览型号A80960KB16的Datasheet PDF文件第4页浏览型号A80960KB16的Datasheet PDF文件第5页浏览型号A80960KB16的Datasheet PDF文件第6页浏览型号A80960KB16的Datasheet PDF文件第7页 
80960KB  
80960KB  
EMBEDDED 32-BIT MICROPROCESSOR  
WITH INTEGRATED FLOATING-POINT UNIT  
High-Performance Embedded  
Built-in Interrupt Controller  
Architecture  
— 25 MIPS Burst Execution at 25 MHz  
— 31 Priority Levels, 256 Vectors  
— 3.4 µs Latency @ 25 MHz  
— 9.4 MIPS* Sustained Execution at  
25 MHz  
Easy to Use, High Bandwidth 32-Bit Bus  
— 66.7 Mbytes/s Burst  
512-Byte On-Chip Instruction Cache  
— Up to 16 Bytes Transferred per Burst  
— Direct Mapped  
— Parallel Load/Decode for Uncached  
Instructions  
132-Lead Packages:  
— Pin Grid Array (PGA)  
— Plastic Quad Flat-Pack (PQFP)  
Multiple Register Sets  
On-Chip Floating Point Unit  
— Sixteen Global 32-Bit Registers  
— Sixteen Local 32-Bit Registers  
— Four Local Register Sets Stored  
On-Chip  
— Supports IEEE 754 Floating Point  
Standard  
— Four 80-Bit Registers  
— 13.6 Million Whetstones/s (Single  
Precision) at 25 MHz  
— Register Scoreboarding  
4 Gigabyte, Linear Address Space  
Pin Compatible with 80960KA  
FOUR  
80-BIT FP  
REGISTERS  
64- BY 32-BIT  
LOCAL  
REGISTER  
CACHE  
SIXTEEN  
32-BIT GLOBAL  
REGISTERS  
32-BIT  
INSTRUCTION  
EXECUTION  
UNIT  
80-BIT  
FPU  
32-BIT  
BUS CONTROL  
LOGIC  
MICRO-  
INSTRUCTION  
SEQUENCER  
512-BYTE  
INSTRUCTION  
CACHE  
MICRO-  
INSTRUCTION  
ROM  
32-BIT  
BURST  
BUS  
INSTRUCTION  
FETCH UNIT  
INSTRUCTION  
DECODER  
Figure 1. The 80960KB Processor’s Highly Parallel Architecture  
© INTEL CORPORATION, 2004  
August, 2004  
Order Number: 270565-008  

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