Datasheet > A260L

A260L

更新时间： 2024-09-20 05:34:39

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HCPL-260L 高速光耦隔离

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A260L 数据手册

HCPL-260L/060L/263L/063L

High Speed LVTTL Compatible 3.3/5 Volt Optocouplers

Data Sheet

Lead (Pb) Free

RoHS 6 fully

compliant

RoHS 6 fully compliant options available;

-xxxE denotes a lead-free product

Description

Features

The HCPL-260L/060L/263L/063L are optically coupled

gates that combine a GaAsP light emitting diode and

an integrated high gain photo detector. An enable in-

put allows the detector to be strobed. The output of

the detector IC is an open collector Schottky-clamped

transistor. The internal shield provides a guaranteed

common mode transient immunity speciﬁcation of

15 kV/µs at 3.3V.

• 3.3V/5V Dual Supply Voltages

• Low power consumption

• 15 kV/µs minimum Common Mode Rejection (CMR) at

= 1000 V

• High speed: 15 MBd typical

• LVTTL/LVCMOS compatible

• Low input current capability: 5 mA

This unique design provides maximum AC and DC circuit

isolation while achieving LVTTL/LVCMOS compati-bil-

ity. The optocoupler AC and DC operational parameters

are guaranteed from –40°C to +85°C allowing trouble-

free system performance.

• Guaranteed AC and DC performance over tempera-

ture: –40°C to +85°C

• Available in 8-pin DIP, SOIC-8

• Strobable output (single channel products only)

• Safety approvals: UL, CSA, IEC/EN/DIN EN 60747-5-2

These optocouplers are suitable for high speed logic

interfacing, input/output buﬀering, as line receivers in

environments that conventional line receivers cannot

tolerate and are recommended for use in extremely high

ground or induced noise environments.

Applications

• Isolated line receiver

• Computer-peripheral interfaces

• Microprocessor system interfaces

• Digital isolation for A/D, D/A conversion

• Switching power supply

• Instrument input/output isolation

• Ground loop elimination

• Pulse transformer replacement

• Field buses

Functional Diagram

HCPL-260L/060L

HCPL-263L/063L

ANODE

CATHODE

ANODE

CATHODE

GND

SHIELD

TRUTH TABLE

(POSITIVE LOGIC)

TRUTH TABLE

(POSITIVE LOGIC)

LED ENABLE OUTPUT

LED OUTPUT

OFF

A 0.1 µF bypass capacitor must be

connected between pins 5 and 8.

CAUTION: It is advised that normal static precautions be taken in handling and assembly

of this component to prevent damage and/or degradation which may be induced by ESD.

12 3 4 5 6 7...20

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