Datasheet > A1K-L67130L-70

A1K-L67130L-70

更新时间： 2022-12-01 21:13:36

品牌	Logo	应用领域
TEMIC		静态存储器
页数	文件大小	规格书
16页	196K
描述
Dual-Port SRAM, 1KX8, 70ns, CMOS, CDIP48, 0.600 INCH, CERAMIC, DIP-48

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A1K-L67130L-70 数据手册

L67130/L67140

Interface

Pin Configuration

52 PIN PLCC (top view)

48 PIN PLCC (top view)

48 PIN DIL (top view), ceramic,

plastic 600 mils

64 PIN VQFP

(top view)

Block Diagram

Notes : 1. L 67130 (MASTER) : BUSY is open drain output and requires pullup resistor

L 67140 (SLAVE) : BUSY in input

2. Open drain output requires pull-up resistor.

MATRA MHS

Rev. D (19 Fev. 97)

123 4 5 6 7...16

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型号	品牌	描述	获取价格	数据表
A1K-L67130V-45	TEMIC	Dual-Port SRAM, 1KX8, 45ns, CMOS, CDIP48, 0.600 INCH, CERAMIC, DIP-48	获取价格
A1K-L67130V-55	TEMIC	Dual-Port SRAM, 1KX8, 55ns, CMOS, CDIP48, 0.600 INCH, CERAMIC, DIP-48	获取价格
A1K-L67130V-70	TEMIC	Dual-Port SRAM, 1KX8, 70ns, CMOS, CDIP48, 0.600 INCH, CERAMIC, DIP-48	获取价格
A1K-L67132L-45	ATMEL	Dual-Port SRAM, 2KX8, 45ns, CMOS, CDIP48, 0.600 INCH, CERAMIC, DIP-48	获取价格
A1K-L67132L-55	TEMIC	Dual-Port SRAM, 2KX8, 55ns, CMOS, CDIP48, 0.600 INCH, CERAMIC, DIP-48	获取价格
A1K-L67132L-70	TEMIC	Dual-Port SRAM, 2KX8, 70ns, CMOS, CDIP48, 0.600 INCH, CERAMIC, DIP-48	获取价格