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9ZXL1251AKLFT PDF预览

9ZXL1251AKLFT

更新时间: 2022-02-26 10:46:18
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
20页 378K
描述
12-output DB1200ZL Derivative with Integrated 85ohm Terminations

9ZXL1251AKLFT 数据手册

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12-output DB1200ZL Derivative with  
Integrated 85Terminations  
9ZXL1251  
DATASHEET  
General Description  
Features/Benefits  
The 9ZXL1251 meets the demanding requirements of the  
Intel DB1200ZL specification, including the critical low-drift  
requirements of Intel CPUs. It is pin compatible to the  
9ZXL1231 and integrates 24 termination resistors, saving  
85Low-power push-pull HCSL outputs; eliminate 24  
2
resistors, save 41mm of area  
Pin compatible to 9ZX21201 and 9ZXL1231; easy path to  
power and area savings  
2
41mm board area.  
Space-saving 64-pin VFQFPN package  
Fixed feedback path for 0ps input-to-output delay  
9 Selectable SMBus Addresses; multiple devices can  
share the same SMBus Segment  
Recommended Application  
Buffer for Romley, Grantley and Purley Servers, solid state  
storage and PCIe  
12 OE# pins; hardware control of each output  
PLL or bypass mode; supports common and separate clock  
architectures  
Output Features  
12 LP-HCSL Output Pairs w/integrated terminations (Zo =  
85)  
Selectable PLL bandwidth; minimizes jitter peaking in  
downstream PLL's  
Spread Spectrum Compatible; tracks spreading input clock  
for low EMI  
Key Specifications  
Cycle-to-cycle jitter <50ps  
-40°C to +85°C device available; supports demanding  
environmental applications  
Output-to-output skew <50ps  
Input-to-output delay variation <50ps  
PCIe Gen3 phase jitter <1.0ps RMS  
Phase jitter: QPI/UPI >=9.6GB/s <0.2ps rms  
Block Diagram  
OE(11:0)#  
DFB_OUT_NC  
Z-PLL  
(SS Compatible)  
DIF_IN  
DIF_IN#  
DIF(11:0)  
HIBW_BYPM_LOBW#  
100M_133M#  
CKPWRGD/PD#  
SMB_A0_tri  
Logic  
SMB_A1_tri  
SMBDAT  
SMBCLK  
9ZXL1251 REVISION B 11/20/15  
1
©2015 Integrated Device Technology, Inc.  

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