Datasheet > 9ZXL1251EKILF

9ZXL1251EKILF

更新时间： 2024-02-19 04:20:05

品牌	Logo	应用领域
艾迪悌 - IDT		PC
页数	文件大小	规格书
21页	267K
描述
12-Output DB1200ZL for PCIe Gen1â4 and UPI

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9ZXL1251EKILF 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	VFQFPN
包装说明：	VFQFPN-64	针数：	64
Reach Compliance Code：	compliant	风险等级：	2.3
JESD-609代码：	e3	湿度敏感等级：	3
端子面层：	Tin (Sn)	Base Number Matches：	1

9ZXL1251EKILF 数据手册

12-Output DB1200ZL for PCIe

Gen1–4 and UPI

9ZXL1231E / 9ZXL1251E

Datasheet

Description

Features

▪ LP-HCSL outputs; eliminate 24 resistors, save 41mm²of area

The 9ZXL1231E / 9ZXL1251E are second-generation, enhanced

performance DB1200ZL differential buffers. The parts are

pin-compatible upgrades to the 9ZXL1231A and 9ZXL1251A,

while offering much improved phase jitter performance and

increased system security features. A fixed external feedback

maintains low drift for critical QPI/UPI applications.

(1231E)

▪ LP-HCSL outputs with 85Ω Zout; eliminate 48 resistors, save

82mm²of area (1251E)

▪ 12 OE# pins; hardware control of each output

▪ 9 selectable SMBus addresses; multiple devices can share the

same SMBus segment

PCIe Clocking Architectures

Supported

▪ Selectable PLL BW; minimizes jitter peaking in cascaded PLL

topologies

▪ Hardware/SMBus control of PLL bandwidth and bypass;

▪ Common Clocked (CC)

change mode without power cycle

▪ Independent Reference (IR) with and without spread spectrum

▪ Spread spectrum compatible; tracks spreading input clock for

EMI reduction

Typical Applications

▪ 100MHz & 133.33MHz PLL Mode; UPI and legacy QPI support

▪ 9 x 9 mm 64-VFQFPN package; small board footprint

▪ Servers

▪ Storage

▪ Networking

▪ SSDs

Key Specifications

▪ Cycle-to-cycle jitter < 50ps

▪ Output-to-output skew < 50ps

Output Features

▪ Input-to-output delay: fixed at 0ps

▪ Input-to-output delay variation < 50ps

▪ PCIe Gen4 phase jitter: < 0.5ps rms

▪ Phase jitter: QPI/UPI > = 9.6GB/s < 0.2ps rms

▪ Phase jitter: IF-UPI < 1.0ps rms

▪ 12 Low-Power (LP) HCSL output pairs (1231E)

▪ 12 Low-Power (LP) HCSL output pairs with 85Ω Zout (1251E)

Block Diagram

VDDR

VDDA

VDD x3

VDDIO x4

FBOUT_NC#

FBOUT_NC

PLL

DIF_IN#

DIF_IN

DIF11#

DIF11

^100M_133M#

vSADR[1:0]_tri

SMBCLK

outputs

SMBus

Engine Configuration

Factory

SMBDAT

DIF0#

DIF0

^vHIBW_BYPM-LOBW#

^CKPWRGD_PD#

vOE[11:0]#

Control Logic

Resistors are integrated on 9ZXL125x devices and

external on 9ZXL123x devices

GNDA

GND x7

August 14, 2018

12 3 4 5 6 7...21

中文翻译

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与9ZXL1251EKILF相关器件

型号	品牌	获取价格	描述	数据表
9ZXL1251EKILFT	IDT	获取价格	12-Output DB1200ZL for PCIe Gen1â4 and UPI
9ZXL1252E	RENESAS	获取价格	12-Output DB1200ZL PCIe Clock Clock Buffer with SMBus Write Protection
9ZXL1252EKILF	IDT	获取价格	12-Output DB1200ZL Derivative for PCIe Gen1â
9ZXL1252EKILFT	IDT	获取价格	12-Output DB1200ZL Derivative for PCIe Gen1â
9ZXL1530	IDT	获取价格	15-OUTPUT DB1900Z LOW-POWER DERIVATIVE
9ZXL1530	RENESAS	获取价格	15-output DB1900Z Derivative
9ZXL1530_15	IDT	获取价格	15-OUTPUT DB1900Z LOW-POWER DERIVATIVE
9ZXL1530BKLF	IDT	获取价格	15-OUTPUT DB1900Z LOW-POWER DERIVATIVE
9ZXL1530BKLFT	IDT	获取价格	15-OUTPUT DB1900Z LOW-POWER DERIVATIVE
9ZXL1530D	IDT	获取价格	15-Output DB1900Z Derivative for PCIe Gen1â

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