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9ZXL1930BKLF PDF预览

9ZXL1930BKLF

更新时间: 2024-01-21 16:53:24
品牌 Logo 应用领域
艾迪悌 - IDT 输出元件
页数 文件大小 规格书
18页 231K
描述
19-OUTPUT DB1900Z LOW-POWER DERIVATIVE

9ZXL1930BKLF 数据手册

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DATASHEET  
19-OUTPUT DB1900Z LOW-POWER DERIVATIVE  
9ZXL1930  
Description  
Features/Benefits  
The 9ZXL1930 is a low power version of the Intel DB1900Z  
Differential Buffer utilizing Low-Power HCSL (LP-HCSL)  
outputs to reduce power consumption more than 50% from  
the original IDT9ZX21901. It is suitable for PCI-Express  
Gen1/2/3 or QPI/UPI applications, and uses a fixed external  
feedback to maintain low drift for demanding QPI/UPI  
applications.  
Fixed feedback path; 0ps input-to-output delay  
9 Selectable SMBus addresses; Multiple devices can  
share same SMBus segment  
Separate VDDIO for outputs; allows maximum power  
savings  
PLL or bypass mode; PLL can dejitter incoming clock  
Selectable PLL BW; minimizes jitter peaking in  
downstream PLL's  
Recommended Application  
Buffer for Romley, Grantley and Purley Servers  
Spread spectrum compatible; tracks spreading input  
clock for EMI reduction  
SMBus Interface; unused outputs can be disabled  
Key Specifications  
Cycle-to-cycle jitter: < 50ps  
Output-to-output skew: <85ps  
Input-to-output delay: Fixed at 0 ps  
Input-to-output delay variation: <50ps  
Phase jitter: PCIe Gen3 < 1ps rms  
Phase jitter: QPI/UPI 9.6GB/s < 0.2ps rms  
100MHz & 133.33MHz PLL mode; Legacy QPI/UPI  
support  
Differential outputs are Low/Low in power down;  
Maximum power savings  
Output Features  
19 - LP-HCSL Differential Output Pairs  
Block Diagram  
FBOUT_NC  
DIF18  
Z-PLL  
(SS Compatible)  
DIF_IN  
DIF_IN#  
HIBW_BYPM_LOBW#  
100M_133M#  
CKPWRGD/PD#  
SMB_A0_tri  
DIF0  
Logic  
SMB_A1_tri  
SMBDAT  
SMBCLK  
IDT® 19-OUTPUT DB1900Z LOW-POWER DERIVATIVE  
1
9ZXL1930  
REV D 112015  

9ZXL1930BKLF 替代型号

型号 品牌 替代类型 描述 数据表
9ZXL1930BKLFT IDT

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