Datasheet > 9ZXL1950BKLF

9ZXL1950BKLF

更新时间： 2022-02-26 11:30:36

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
18页	296K
描述
19-output DB1900Z Low-Power Derivative w/85ohm Terminations

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9ZXL1950BKLF 数据手册

19-output DB1900Z Low-Power Derivative

w/85ohm Terminations

9ZXL1950

DATASHEET

General Description

Features/Benefits

The 9ZXL1950 is a DB1900Z derivative buffer utilizing

Low-Power HCSL (LP-HCSL) outputs to increase edge rates

on long traces, reduce board space, and reduce power

consumption more than 50% from the original 9ZX21901.It is

pin-compatible to the 9ZXL1930 and fully integrates the

output terminations. It is suitable for PCI-Express Gen1/2/3 or

QPI/UPI applications, and uses a fixed external feedback to

maintain low drift for demanding QPI/UPI applications.

• LP-HCSL outputs; up to 90% IO power reduction, better

signal integrity over long traces

• Direct connect to 85Ω transmission lines; eliminates 76

termination resistors, saves 130mm area

• Pin compatible to the 9ZXL1930; easy upgrade to reduced

board space

• 72-pin VFQFPN package; smallest 19-output Z-buffer

• Fixed feedback path; ~0ps input-to-output delay

Recommended Application

Buffer for Romley, Grantley and Purley Servers

• 9 Selectable SMBus addresses; multiple devices can share

same SMBus segment

• Separate VDDIO for outputs; allows maximum power

savings

Output Features

• PLL or bypass mode; PLL can dejitter incoming clock

• 100MHz & 133.33MHz PLL mode; legacy QPI support

19 LP-HCSL output pairs w/integrated terminations (Zo =

85

• Selectable PLL BW; minimizes jitter peaking in downstream

PLL's

Key Specifications

• Cycle-to-cycle jitter: <50ps

• Output-to-output skew: <50ps

• Spread spectrum compatible; tracks spreading input clock

for EMI reduction

• Input-to-output delay variation: <50ps

• Phase jitter: PCIe Gen3 <1ps rms

• Phase jitter: QPI/UPI 9.6GB/s <0.2ps rms

• SMBus Interface; unused outputs can be disabled

Block Diagram

FBOUT_NC

Z-PLL

(SS Compatible)

DIF_IN

DIF_IN#

DIF(18:0)

HIBW_BYPM_LOBW#

100M_133M#

CKPWRGD/PD#

SMB_A0_tri

SMB_A1_tri

SMBDAT

Logic

SMBCLK

9ZXL1950 REVISION E 11/20/15

12 3 4 5 6 7...18

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与9ZXL1950BKLF相关器件

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9ZXL1950BKLFT	IDT	19-output DB1900Z Low-Power Derivative w/85ohm Terminations	获取价格
9ZXL1950D	RENESAS	19-Output DB1900ZL PCIe Zero-Delay/Fanout Clock Buffer	获取价格
9ZXL1950DKILF	IDT	19-Output DB1900Z Derivative for PCIe Gen1â	获取价格
9ZXL1950DKILFT	IDT	19-Output DB1900Z Derivative for PCIe Gen1â	获取价格
9ZXL1951D	IDT	19-Output DB1900ZL Derivat ive for PCIe Gen1â	获取价格
9ZXL1951D	RENESAS	19-Output DB1900ZL PCIe Zero-Delay/Fanout Clock Buffer	获取价格