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9ZXL0831 PDF预览

9ZXL0831

更新时间: 2024-01-17 10:30:31
品牌 Logo 应用领域
艾迪悌 - IDT 输出元件
页数 文件大小 规格书
18页 347K
描述
8-OUTPUT

9ZXL0831 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:VFQFPN
包装说明:HVQCCN,针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.71
系列:9ZXL输入调节:DIFFERENTIAL MUX
JESD-30 代码:S-XQCC-N48JESD-609代码:e3
长度:6 mm逻辑集成电路类型:PLL BASED CLOCK DRIVER
湿度敏感等级:3功能数量:1
反相输出次数:端子数量:48
实输出次数:16最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260Same Edge Skew-Max(tskwd):0.065 ns
座面最大高度:1 mm最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.4 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6 mm
Base Number Matches:1

9ZXL0831 数据手册

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9ZXL0831  
8-OUTPUT DB800ZL  
Absolute Maximum Ratings  
Stresses above the ratings listed below can cause permanent damage to the 9ZXL0831. These ratings, which are standard  
values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other  
conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute  
maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over  
the recommended operating temperature range.  
PARAMETER  
SYMBOL  
CONDITIONS  
UNITS NOTES  
MIN  
TYP  
MAX  
4.6  
VDD, VDDA,  
VDDR  
3.3V Supply Voltage  
VDD for core logic and PLL  
V
1,2  
Input Low Voltage  
Input High Voltage  
Input High Voltage  
VIL  
GND-0.5  
V
V
V
°C  
°C  
V
1
1
1
VIH  
Except for SMBus interface  
SMBus clock and data pins  
VDD+0.5V  
5.5V  
VIHSMB  
1
1
1
Storage Temperature  
Junction Temperature  
Input ESD protection  
Ts  
Tj  
ESD prot  
-65  
150  
125  
Human Body Model  
2000  
1Guaranteed by design and characterization, not 100% tested in production.  
2 Operation under these conditions is neither implied nor guaranteed.  
Electrical Characteristics–DIF_IN Clock Input Parameters (HCSL-compatible)  
TA = TCOM; Supply Voltage VDD = 3.3 V +/-5%  
PARAMETER  
SYMBOL  
VCROSS  
CONDITIONS  
MIN  
150  
TYP  
MAX  
900  
UNITS NOTES  
Input Crossover Voltage -  
DIF_IN  
Cross Over Voltage  
mV  
1
Input Swing - DIF_IN  
Input Slew Rate - DIF_IN  
Input Leakage Current  
Input Duty Cycle  
VSWING  
dv/dt  
IIN  
Differential value  
Measured differentially  
300  
0.4  
-5  
mV  
V/ns  
uA  
1
8
5
1,2  
VIN = VDD , VIN = GND  
dtin  
Measurement from differential wavefrom  
45  
0
55  
125  
%
1
1
Input Jitter - Cycle to Cycle  
JDIFIn  
Differential Measurement  
ps  
1 Guaranteed by design and characterization, not 100% tested in production.  
2Slew rate measured through +/-75mV window centered around differential zero  
IDT® 8-OUTPUT DB800ZL  
5
9ZXL0831  
REV E 081616  

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