Datasheet > 9FGV0841AKLFT

9FGV0841AKLFT

更新时间： 2024-11-20 01:01:35

品牌	Logo	应用领域
艾迪悌 - IDT		PC
页数	文件大小	规格书
17页	280K
描述
8-O/P 1.8V PCIe Gen 1-2-3 Clock Generator

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中文翻译

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替代型号

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9FGV0841AKLFT 数据手册

8-O/P 1.8V PCIe Gen 1-2-3 Clock Generator

w/Zo=100ohms

9FGV0841

DATASHEET

Description

Features/Benefits

The 9FGV0841 is a member of IDT's SOC-Friendly 1.8V

Very-Low-Power PCIe clock family. It has integrated output

terminations providing Zo=100 for direction connection to

100 transmission lines. The device has 8 output enables for

clock management, 2 different spread spectrum levels in

addition to spread off and 2 selectable SMBus addresses.

• Direct connection to 100Ω transmission lines; saves 32

resistors compared to standard PCIe devices

• 62mW typical power consumption; reduced thermal

concerns

• Outputs can optionally be supplied from any voltage

between 1.05 and 1.8V; maximum power savings

• OE# pins; support DIF power management

• LP-HCSL differential clock outputs; reduced power and

board space

Recommended Application

1.8V PCIe Gen1-2-3 clock generator

• Programmable Slew rate for each output; allows tuning for

various line lengths

Output Features

• 8 - 100MHz Low-Power (LP) HCSL DIF pairs w/Zo=100

• 1 - 1.8V LVCMOS REF output w/Wake-On-LAN (WOL)

support

• Programmable output amplitude; allows tuning for various

application environments

• DIF outputs blocked until PLL is locked; clean system

start-up

• Selectable 0%, -0.25% or -0.5% spread on DIF outputs;

reduces EMI

Key Specifications

• External 25MHz crystal; supports tight ppm with 0 ppm

• DIF cycle-to-cycle jitter <50ps

synthesis error

• DIF output-to-output skew <50ps

• DIF phase jitter is PCIe Gen1-2-3 compliant

• REF phase jitter is < 1.5ps RMS

• Configuration can be accomplished with strapping pins;

SMBus interface not required for device control

• 3.3V tolerant SMBus interface works with legacy

controllers

• Selectable SMBus addresses; multiple devices can easily

share an SMBus segment

• Space saving 48-pin 6x6 mm VFQFPN; minimal board

space

Block Diagram

vOE(7:0)#

REF1.8

XIN/CLKIN_25

OSC

DIF7

DIF6

DIF5

SS Capable PLL

DIF4

DIF3

DIF2

DIF1

DIF0

vSADR

vSS_EN_tri

CONTROL

LOGIC

^CKPWRGD_PD#

SDATA_3.3

SCLK_3.3

9FGV0841 OCTOBER 18, 2016

12 3 4 5 6 7...17

中文翻译

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9FGV0841AKLFT 替代型号

型号	品牌	替代类型	描述	数据表
9FGV0841AKILF	IDT	功能相似	8-O/P 1.8V PCIe Gen 1-2-3 Clock Generator

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