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935324977557 PDF预览

935324977557

更新时间: 2024-11-10 20:44:51
品牌 Logo 应用领域
恩智浦 - NXP 外围集成电路
页数 文件大小 规格书
197页 1492K
描述
RISC Microprocessor

935324977557 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:unknown风险等级:5.73
uPs/uCs/外围集成电路类型:MICROPROCESSOR, RISCBase Number Matches:1

935324977557 数据手册

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Document Number T1042  
Rev. 2, 06/2015  
Freescale Semiconductor  
Data Sheet: Technical Data  
T1042  
QorIQ T1042, T1022 Data  
Sheet  
Features  
• Additional peripheral interfaces  
– Two high-speed USB 2.0 controllers with integrated  
PHY  
– Enhanced secure digital host controller with support  
for high capacity memory card(SD/eSDHC/eMMC)  
– Enhanced Serial peripheral interface (eSPI)  
– Four I2C controllers  
– Two DUARTs  
– Integrated flash controller supporting NAND and  
NOR flash  
• e5500 cores built on Power Architecture® technology,  
– T1042 has four cores and T1022 has two cores  
– Each core with a private 256KB L2 cache  
• 256 KB shared L3 CoreNet platform cache (CPC)  
• Hierarchical interconnect fabric  
– CoreNet Coherency manager supporting coherent  
and non-coherent transactions with prioritization and  
bandwidth allocation amongst CoreNet end-points  
– 150Gbps coherent read bandwidth  
– Display interface unit (DIU) with 12-bit dual data  
rate  
• One 32-/64-bit DDR3L/DDR4 SDRAM memory  
controllers  
– TDM Interface  
– Four GPIO controllers supporting up to 109 general  
purpose I/O signals  
– ECC and interleaving support  
– Two 8-channel DMA engines  
– Multicore programmable interrupt controller (MPIC)  
• Data Path Acceleration Architecture (DPAA)  
incorporating acceleration for the following functions:  
– Packet parsing, classification, and distribution  
– Queue management for scheduling, packet  
sequencing, and congestion management  
– Hardware buffer management for buffer allocation  
and de-allocation  
• QUICC Engine block  
– 32-bit RISC controller for flexible support of the  
communications peripherals  
– Serial DMA channel for receive and transmit on all  
serial channels  
– Cryptography Acceleration  
– RegEx Pattern Matching Acceleration  
– IEEE Std 1588™ support  
– Two universal communication controllers,  
supporting TDM, HDLC and UART  
• 780 FC-PBGA package, 23 mm x 23 mm  
• Parallel Ethernet interfaces  
– Up to two RGMII interface  
– One MII interface  
• Eight SerDes lanes for high-speed peripheral interfaces  
– Four PCI Express 2.0 controllers  
– Two Serial ATA (SATA 3Gb/s) controllers  
– Up to five SGMII interface supporting 1000 Mbps  
– Up to two SGMII interface with maximum speed of  
2500 Mbps  
– Supports 1000Base-KX  
© 2015 Freescale Semiconductor, Inc.  

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