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935325317557 PDF预览

935325317557

更新时间: 2024-11-08 21:06:15
品牌 Logo 应用领域
恩智浦 - NXP 外围集成电路
页数 文件大小 规格书
88页 1109K
描述
RISC Microprocessor

935325317557 技术参数

生命周期:ActiveReach Compliance Code:unknown
uPs/uCs/外围集成电路类型:MICROPROCESSOR, RISCBase Number Matches:1

935325317557 数据手册

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MPC8541EEC  
Rev. 4.2, 1/2008  
Freescale Semiconductor  
Technical Data  
MPC8541E PowerQUICC™ III  
Integrated Communications Processor  
Hardware Specification  
Contents  
The MPC8541E integrates a PowerPC™ processor core  
1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
built on Power Architecture™ technology with system logic  
required for networking, telecommunications, and wireless  
infrastructure applications. The MPC8541E is a member of  
the PowerQUICC™ III family of devices that combine  
system-level support for industry-standard interfaces with  
processors that implement the embedded category of the  
Power Architecture technology. For functional  
characteristics of the processor, refer to the MPC8555E  
PowerQUICC™ III Integrated Communications Processor  
Reference Manual.  
2. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 7  
3. Power Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 12  
4. Clock Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
5. RESET Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
6. DDR SDRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
7. DUART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
8. Ethernet: Three-Speed, MII Management . . . . . . . . . . 21  
9. Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32  
10. CPM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42  
11. JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48  
12. I2C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50  
13. PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52  
14. Package and Pin Listings . . . . . . . . . . . . . . . . . . . . . . . 54  
15. Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64  
16. Thermal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67  
17. System Design Information . . . . . . . . . . . . . . . . . . . . . 76  
18. Document Revision History . . . . . . . . . . . . . . . . . . . . 83  
19. Device Nomenclature . . . . . . . . . . . . . . . . . . . . . . . . . 84  
To locate any published errata or updates for this document  
refer to http://www.freescale.com or contact your Freescale  
sales office.  
© Freescale Semiconductor, Inc., 2008. All rights reserved.  

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