Datasheet > 935299035118

935299035118

更新时间： 2024-11-07 14:47:51

品牌	Logo	应用领域
恩智浦 - NXP		驱动光电二极管输出元件
页数	文件大小	规格书
24页	173K
描述
HC/UH SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, 7.50 MM, PLASTIC, MS-013, SOT163-1, SOP-20

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935299035118 技术参数

生命周期：	Transferred	包装说明：	SOP,
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.58	系列：	HC/UH
JESD-30 代码：	R-PDSO-G20	长度：	12.8 mm
逻辑集成电路类型：	BUS DRIVER	位数：	8
功能数量：	1	端口数量：	2
端子数量：	20	最高工作温度：	125 °C
最低工作温度：	-40 °C	输出特性：	3-STATE
输出极性：	TRUE	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	传播延迟（tpd）：	265 ns
筛选级别：	AEC-Q100	座面最大高度：	2.65 mm
最大供电电压 (Vsup)：	6 V	最小供电电压 (Vsup)：	2 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	AUTOMOTIVE
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	宽度：	7.5 mm
Base Number Matches：	1

935299035118 数据手册

74HC373-Q100; 74HCT373-Q100

Octal D-type transparent latch; 3-state

Rev. 1 — 10 August 2012

Product data sheet

1. General description

The 74HC373-Q100; 74HCT373-Q100 is a high-speed Si-gate CMOS device and is pin

compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC

standard no. 7A.

The 74HC373-Q100; 74HCT373-Q100 is an octal D-type transparent latch featuring

separate D-type inputs for each latch and 3-state outputs for bus-oriented applications. A

latch enable (LE) input and an output enable (OE) input are common to all latches.

The 74HC373-Q100; 74HCT373-Q100 consists of eight D-type transparent latches with

3-state true outputs. When LE is HIGH, data at the Dn inputs enters the latches. In this

condition the latches are transparent, i.e. a latch output changes state each time its

corresponding D input changes.

When LE is LOW, the latches store the information that was present at the D inputs a

set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents

of the 8 latches are available at the outputs. When OE is HIGH, the outputs go to the high-

impedance OFF-state. Operation of the OE input does not affect the state of the latches.

The 74HC373-Q100; 74HCT373-Q100 is functionally identical to:

• 74HC573-Q100; 74HCT573-Q100: but different pin arrangement

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 Input levels:

 For 74HC373-Q100: CMOS level

 For 74HCT373-Q100: TTL level

 3-state non-inverting outputs for bus-oriented applications

 Common 3-state output enable input

 Functionally identical to the 74HC573-Q100; 74HCT573-Q100

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

 Multiple package options

12 3 4 5 6 7...24

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与935299035118相关器件

型号	品牌	获取价格	描述	数据表
935299235125	NXP	获取价格	AHC/VHC/H/U/V SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5, PLASTIC, SC-74A, SOT-753, 5 PIN
935299238125	NXP	获取价格	AHCT/VHCT/VT SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5, PLASTIC, SC-74A, SOT-753, 5 PIN
935299239125	NXP	获取价格	AHCT/VHCT/VT SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5, 1.25 MM, PLASTIC, MO-203, SC-88A, S
935299254115	NXP	获取价格	LVC/LCX/Z SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PQCC20, 2.50 X 4.50 MM, 0.85 MM HEIGHT,
935299283125	NXP	获取价格	NAND Gate, LVC/LCX/Z Series, 1-Func, 2-Input, CMOS, PDSO5
935299284125	NXP	获取价格	NAND Gate, LVC/LCX/Z Series, 1-Func, 2-Input, CMOS, PDSO5
935299286125	NXP	获取价格	AND Gate, LVC/LCX/Z Series, 1-Func, 3-Input, CMOS, PDSO6
935299308125	NXP	获取价格	LVC/LCX/Z SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6, PLASTIC, SC-88, SOT-363, 6 PIN
935299314118	NXP	获取价格	LVC/LCX/Z SERIES, QUAD 2-INPUT OR GATE, PDSO14, 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-
935299315115	NXP	获取价格	LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PQCC20, 2.50 X 4.50 MM, 0.85 MM HEIGHT, PLAST

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